w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 20

• Manufacturer Part Number: w83877atd
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

2.0 FDC FUNCTIONAL DESCRIPTION
2.1 W83877ATF FDC
The floppy disk controller of the W83877ATF integrates all of the logic required for floppy disk
control. The FDC implements a PC/AT or PS/2 solution. All programmable options default to
compatible values. The FIFO provides better system performance in multi-master systems. The
digital data separator supports up to data rate 1 M bits/sec or 2 M bits/sec.
The FDC includes the following blocks: AT interface, Precompensation, Data Rate Selection, Digital
Data Separator, FIFO, and FDC Core.
2.1.1 AT interface
The interface consists of the standard asynchronous signals: RD , WR , A0-A3, IRQ, DMA control,
and a data bus. The address lines select between the configuration registers, the FIFO and
control/status registers. This interface can be switched between PC/AT, Model 30, or PS/2 normal
modes. The PS/2 register sets are a superset of the registers found in a PC/AT.
2.1.2 FIFO (Data)
The FIFO is 16 bytes in size and has programmable threshold values. All command parameter
information and disk data transfers go through the FIFO. Data transfers are governed by the RQM
and DIO bits in the Main Status Register.
The FIFO defaults to disabled mode after any form of reset. This maintains PC/AT hardware
compatibility. The default values can be changed through the CONFIGURE command. The
advantage of the FIFO is that it allows the system a larger DMA latency without causing disk errors.
The following tables give several examples of the delays with a FIFO. The data are based upon the
following formula:
FIFO THRESHOLD
FIFO THRESHOLD
15 Byte
15 Byte
1 Byte
2 Byte
8 Byte
1 Byte
2 Byte
8 Byte
THRESHOLD
2
8
15
1
2
8
15
1
(1/Data Rate) *8 - 1.5 S = DELAY
16 S - 1.5 S = 30.5 S
16 S - 1.5 S = 6.5 S
8 S - 1.5 S = 6.5 S
8 S - 1.5 S = 14.5 S
8 S - 1.5 S = 62.5 S
16 S - 1.5 S = 14.5 S
16 S - 1.5 S = 238.5 S
8 S - 1.5 S = 118.5 S
MAXIMUM DELAY TO SERVICING AT 500K BPS
MAXIMUM DELAY TO SERVICING AT 1M BPS
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Data Rate
Data Rate
Publication Release Date: April 1998
W83877ATF
Version 0.51