w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 158

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w83877atd

Manufacturer Part Number
w83877atd
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
8.4.2 Power Management 1 Status Register 2 (PM1STS2)
Register Location:
Default Value:
Attribute:
Size:
0-6
7
8.4.3 Power Management 1 Enable Register 1(PM1EN1)
Register Location:
Default Value:
Attribute:
Size:
Bit
Reserved
WAK_STS
Name
7
7
6
6
Reserved.
This bit is set when the system is in the sleeping state and an enabled resume
event occurs. Upon setting this bit, the sleeping/working state machine will
transition the system to the working state. This bit is only set by hardware, and
is cleared by software writing a 1 to this bit position or by the sleeping/working
state machine automatically upon the expiry of the global standby timer.
Writing a 0 has no effect. Upon the WAK_STS beingcleared and all devices
being in sleeping state, the whole chip enters the sleeping state.
<CR33>+1H System I/O Space
00h
Read/write
8 bits
<CR33>+2H System I/O Space
00h
Read/write
8 bits
5
5
4
4
3
3
2
2
1
1
- 154 -
0
0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
WAK_STS
TMR_EN
Reserved
Reserved
Reserved
GBL_EN
Reserved
Reserved
Reserved
Description
Publication Release Date: April 1998
W83877ATF
Version 0.51

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