w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 91

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w83877atd

Manufacturer Part Number
w83877atd
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
4 .2.6 Bit Map of Parallel Port and EPP Registers
4.2.7 EPP Pin Descriptions
4.2.8 EPP Operation
When the EPP mode is selected in the configuration register, the standard and bi-directional modes
are also available. The PDx bus is in the standard or bi-directional mode when no EPP read, write, or
address cycle is currently being executed. In this condition all output signals are set by the SPP
Control Port and the direction is controlled by DIR of the Control Port.
A watchdog timer is required to prevent system lockup. The timer indicates that more than 10 S
have elapsed from the start of the EPP cycle to the time
is aborted when a time-out occurs. The time-out condition is indicated in Status bit 0.
Data Port (R/W)
Status Buffer (Read)
Control Swapper (Read)
Control Latch (Write)
EPP Address Port
(R/W)
EPP Data Port 0 (R/W)
EPP Data Port 1 (R/W)
EPP Data Port 2 (R/W)
EPP Data Port 3 (R/W)
nWrite
PD<0:7>
Intr
nWait
PE
Select
nDStrb
nError
nInits
nAStrb
EPP NAME
REGISTER
TYPE
I/O
O
O
O
O
I
I
I
I
I
Denotes an address or data read or write operation.
Bi-directional EPP address and data bus.
Used by peripheral device to interrupt the host.
Inactive to acknowledge that data transfer is completed. Active to
indicate that the device is ready for the next transfer.
Paper end; same as SPP mode.
Printer selected status; same as SPP mode.
This signal is active low. It denotes a data read or write operation.
Error; same as SPP mode.
This signal is active low. When it is active, the EPP device is reset to its
initial operating mode.
This signal is active low. It denotes an address read or write operation.
BUSY
PD7
PD7
PD7
PD7
PD7
PD7
7
1
1
ACK
PD6
PD6
PD6
PD6
PD6
PD6
6
1
1
PD5
PD5
PD5
PD5
PD5
PD5
DIR
PE
5
1
- 87 -
IRQEN
SLCT
PD4
PD4
PD4
PD4
PD4
PD4
IRQ
EPP DESCRIPTION
4
WAIT
ERROR
SLIN
SLIN
PD3
PD3
PD3
PD3
PD3
PD3
is de-asserted. The current EPP cycle
3
Publication Release Date: April 1998
PD2
PD2
PD2
PD2
PD2
PD2
INIT
INIT
2
1
W83877ATF
AUTOFD
AUTOFD
PD1
PD1
PD1
PD1
PD1
PD1
1
1
Version 0.51
STROBE
STROBE
TMOUT
PD0
PD0
PD0
PD0
PD0
PD0
0

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