w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 90

• Manufacturer Part Number: w83877atd
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

4 .2.4 EPP Address Port
The address port is available only in EPP mode. Bit definitions are as follows:
The contents of DB0-DB7 are buffered (non-inverting) and output to ports PD0-PD7 during a write
operation. The leading edge of IOW
trailing edge of IOW latches the data for the duration of the EPP write cycle.
PD0-PD7 ports are read during a read operation. The leading edge of IOR causes an EPP address
read cycle to be performed and the data to be output to the host CPU.
4.2.5 EPP Data Port 0-3
These four registers are available only in EPP mode. Bit definitions of each data port are as follows:
When accesses are made to any EPP data port, the contents of DB0-DB7 are buffered (non-
inverting) and output to the ports PD0-PD7 during a write operation. The leading edge of IOW causes
an EPP data write cycle to be performed, and the trailing edge of IOW latches the data for the
duration of the EPP write cycle.
During a read operation, ports PD0-PD7 are read, and the leading edge of IOR causes an EPP read
cycle to be performed and the data to be output to the host CPU.
7
7
6
6
c
auses an EPP address write cycle to be performed, and the
5
5
4
4
3
3
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2
2
1
1
0
0
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
Publication Release Date: April 1998
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
W83877ATF
Version 0.51