w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 160

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w83877atd

Manufacturer Part Number
w83877atd
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
0
1
2
3-7
8.4.6 Power Management 1 Control Register 2 (PM1CTL2)
Register Location:
Default Value:
Attribute:
Size:
0-7
Bit
Bit
SCI_EN
BM_RLD
GBL_RLS
Reserved
Reserved
Name
Name
7
7
6
6
Reserved. These bits always return a value of zero.
Select the power management event to be either an SCI or an SMI interrupt.
When this bit is set, the power management events will generate an SCI
interrupt. When this bit is reset and SMI_EN bit is set, the power management
events will generate an SMI interrupt.
This is the bus master reload enable bit. If this bit is set and BM_CNTRL is
set, an SCI interrupt is raised.
The global release bit. This bit is used by the ACPI software to raise an event
to the BIOS software. The BIOS software has a corresponding enable and
status bit to control its ability to receive the ACPI event. Setting GBL_RLS
sets BIOS_STS, and it generates an SMI interrupt if BIOS_EN is also set.
Reserved. These bits always return a value of zero.
<CR33>+5H System I/O Space
00h
Read/write
8 bits
5
5
4
4
3
3
2
2
1
1
- 156 -
0
0
Description
SCI_EN
BM_RLD
GBL_RLD
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Description
Publication Release Date: April 1998
W83877ATF
Version 0.51

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