w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 131

• Manufacturer Part Number: w83877atd
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

When the device is in Extended Function mode and EFIR is 23H, the CR23 register can be accessed
through EFDR. Default = DEH if CR16 bit 2 = 1; default = 00H if CR16 bit 2 = 0. The bit definitions
are as follows:
This register is used to select the base address of the parallel port. If EPP is disable, the parallel port
can be set from 100H-3FCH on 4-byte boundaries. If EPP is enable, the parallel port can be set from
100H-3F8H on 8-byte boundaries. NCS = 0 and A10 = 0 are required to access the parallel port when
in compatible, bi-directional, or EPP modes. A10 is active in ECP mode.
PRTAD7-PRTAD0 (Bit 7-bit 0): match A[9:2]. Bit 7 = 0 and bit 6 = 0 disable this decode.
8.2.28 Configuration Register 24 (CR24)
When the device is in Extended Function mode and EFIR is 24H, the CR24 register can be accessed
through EFDR. Default = FEH if CR16 bit 2 = 1; default = 00H if CR16 bit 2 = 0. The bit definitions
are as follows:
This register is used to select the base address of the UART A from 100H-3F8H on 8-byte
boundaries. NCS = 0 and A10 = 0 are required to access the UART A registers. A[2:0] are don't-care
conditions.
URAAD7-URAAD1 (Bit 7-bit 1): match A[9:3]. Bit 7 = 0 and bit 6 = 0 disable this decode.
Bit 0: Reserved, fixed at zero.
8.2.29 Configuration Register 25 (CR25)
When the device is in Extended Function mode and EFIR is 25H, the CR25 register can be accessed
through EFDR. Default = BEH if CR16 bit 2 = 1; default = 00H if CR16 bit 2 = 0. The bit definitions
are as follows:
7
7
6
6
5
5
4
4
3
3
- 127 -
2
2
1
1
0
0
PRTAD0
PRTAD1
PRTAD2
PRTAD3
PRTAD4
PRTAD5
PRTAD6
PRTAD7
reserved
URAAD1
URAAD2
URAAD3
URAAD4
URAAD5
URAAD6
URAAD7
Publication Release Date: April 1998
W83877ATF
Version 0.51