w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 95

• Manufacturer Part Number: w83877atd
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

4.3.4 Device Control Register (DCR)
The bit definitions are as follows:
Bit 6, 7: These two bits are logic one during a read and cannot be written.
Bit 5: This bit has no effect and the direction is always out if mode = 000 or mode = 010. Direction is
Bit 4: Interrupt request enable. When this bit is set to a high level, it may be used to enable interrupt
Bit 3: This bit is inverted and output to the SLIN output.
Bit 2: This bit is output to the INIT output.
Bit 1: This bit is inverted and output to the AFD output.
Bit 0: This bit is inverted and output to the STB output.
4.3.5 cFifo (Parallel Port Data FIFO) Mode = 010
This mode is defined only for the forward direction. The standard parallel port protocol is used by a
hardware handshake to the peripheral to transmit bytes written or DMAed from the system to this
FIFO. Transfers to the FIFO are byte aligned.
4.3.6 ecpDFifo (ECP Data FIFO) Mode = 011
When the direction bit is 0, bytes written or DMAed from the system to this FIFO are transmitted by a
hardware handshake to the peripheral using the ECP parallel port protocol. Transfers to the FIFO are
byte aligned.
When the direction bit is 1, data bytes from the peripheral are read under automatic hardware
handshake from ECP into this FIFO. Reads or DMAs from the FIFO will return bytes of ECP data to
the system.
valid in all other modes.
requests from the parallel port to the CPU due to a low to high transition on the ACK input.
0 the parallel port is in output mode.
1 the parallel port is in input mode.
0 The printer is not selected.
1 The printer is selected.
7
1
6
1
5
4
3
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2
1
0
Autofd
Direction
Strobe
nInit
Select In
AckInt En
Publication Release Date: April 1998
W83877ATF
Version 0.51