w83977atf Winbond Electronics Corp America, w83977atf Datasheet - Page 158

• Manufacturer Part Number: w83977atf
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

CRF2 (Default 0x00)
input to the device. The device's idle timer reloads the preset expiry depending on which device
wakes up. These 5 bits are controlled by IR, the printer port, FDC, UART A, and UART B power
down machines respectively. Writing a 1 clears this bit, and writing a 0 has no effect. Note that the
user is not supposed to change the status while power management function is enabled.
CRF3 (Default 0x00)
Bit 7 : Reserved. Return zero when read.
Bit 6: IRTRAPSTS. IR trap status.
These bits indicate that the individual device wakes up due to any I/O access, IRQ, and external
Bit 5 - 4: Reserved. Return zero when read.
Bit 3: PRTTRAPSTS. Printer port trap status.
Bit 2: FDCTRAPSTS. FDC trap status.
Bit 1: URATRAPSTS. UART A trap status.
Bit 0: URBTRAPSTS. UART B trap status.
These bits indicate the IRQ status of the individual device. The device's IRQ status
by their source device and is cleared by writing a 1. Writing a 0 has no effect.
Bit 7: Reserved. Return zero when read.
Bit 6: IRIRQSTS. IR IRQ status.
Bit 5: MOUIRQSTS. MOUSE IRQ status.
Bit 4: KBCIRQSTS. KBC IRQ status.
Bit 3: PRTIRQSTS. printer port IRQ status.
Bit 2: FDCIRQSTS. FDC IRQ status.
= 0
= 1
= 0
= 1
= 0
= 1
= 0
= 1
= 0
= 1
IR is now in the sleeping state.
IR is now in the working state due to any IR access, any IRQ, the receiver
the printer port is now in the sleeping state.
the printer port is now in the working state due to any printer port access, any IRQ,
any DMA acknowledge, and any transition on BUSY, ACK , PE, SLCT, and ERR
pins.
FDC is now in the sleeping state.
FDC is now in the working state due to any FDC access, any IRQ, any DMA
acknowledge, and any enabling of the motor enable bits in the DOR register.
UART A is now in the sleeping state.
UART A is now in the working state due to any UART A access, any IRQ, the
receiver begins receiving a start bit, the transmitter shift register begins transmitting a
start bit, and any transition on MODEM control input lines.
UART B is now in the sleeping state.
UART B is now in the working state due to any UART B access, any IRQ, the
receiver begins receiving a start bit, the transmitter shift register begins transmitting
a start bit, and any transition on MODEM control input lines.
begins receiving a start bit, and the transmitter shift register begins transmitting a
start bit.
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Publication Release Date:April 1998
W83977ATF
PRELIMINARY
Revision 0.52
bit is set