w83977atf Winbond Electronics Corp America, w83977atf Datasheet - Page 160

• Manufacturer Part Number: w83977atf
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

Bit 0: URBIRQEN.
CRF7 (Default 0x00)
CRFE, FF (Default 0x00)
Bit 7 - 2: Reserved. Return zero when read.
This bit selects the fast expiry time of individual devices.
Bit 0: SMI_EN.
This bit is the SMI output pin enable bit. When an SMI event is raised on the output of the SMI
logic, setting this bit enables the SMI interrupt to be generated on the pin SMI . If this bit is
cleared, only the IRQ status bit in CRF3 is set and no SMI interrupt is generated on the pin SMI .
Reserved. Reserved for Winbond test.
Bit 1: FSLEEP.
= 0
= 1
= 0
= 1
= 0
= 1
disable the generation of an
enable the generation of an
1 second
8 milli-seconds
Disable SMI
Enable SMI
SMI
- 160 -
SMI
interrupt due to UART B's IRQ.
interrupt due to UART B's IRQ.
Publication Release Date:April 1998
W83977ATF
PRELIMINARY
Revision 0.52