w83977atf Winbond Electronics Corp America, w83977atf Datasheet - Page 207

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w83977atf

Manufacturer Part Number
w83977atf
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet

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W83977ATF
PRELIMINARY
HKBRST (Hardware Keyboard Reset)
A "1" on this bit selects hardware KB RESET control logic to control KBRESET signal.
A "0" on this bit disable hardware KB RESET control logic function.
When the KBC receives data that follows a "D1" command, the hardware control logic sets or clears
GATE A20 according to the received data bit 1. Similarly, the hardware control logic sets or clears
KBRESET depending on the received data bit 0. When the KBC receives a "FE" command, the
KBRESET is pulse low for 6 S(Min.) with 14 S(Min.) delay.
GATEA20 and KBRESET are controlled by either the software control or the hardware control logic
and they are mutually exclusive. Then, GATEA20 and KBRESET are merged along with Port92
when P92EN bit is set.
6.5.2 Port 92 Control Register (Default Value = 0x24)
7
6
5
4
3
2
1
0
BIT
Res. (0)
Res. (0)
Res. (1)
Res. (0)
Res. (0)
Res. (1)
SGA20
PLKBRST
NAME
SGA20 (Special GATE A20 Control)
A "1" on this bit drives GATE A20 signal to high.
A "0" on this bit drives GATE A20 signal to low.
PLKBRST (Pull-Low KBRESET)
A "1" on this bit causes KBRESET to drive low for 6 S(Min.) with 14 S(Min.) delay. Before issuing
another keyboard reset command, the bit must be cleared.
Publication Release Date:April 1998
- 103 -
Revision 0.52

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