c8051f410 Silicon Laboratories, c8051f410 Datasheet - Page 156

• Manufacturer Part Number: c8051f410
• Description: 2.0 V, 32/16 Kb Flash, Smartclock, 12-bit Adc
• Manufacturer: Silicon Laboratories

C8051F410/1/2/3
156
Bits7–0: Output Configuration Bits for P0.7–P0.0 (respectively): ignored if corresponding bit in regis-
Bits7–0: P0SKIP[7:0]: Port0 Crossbar Skip Enable Bits.
R/W
R/W
Bit7
Bit7
ter P0MDIN is logic 0.
0: Corresponding P0.n Output is open-drain.
1: Corresponding P0.n Output is push-pull.
(Note: When SDA and SCL appear on any of the Port I/O, each are open-drain regardless
of the value of P0MDOUT).
These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana-
log inputs (for ADC or Comparator) or used as special functions (V
lator circuit, CNVSTR input) should be skipped by the Crossbar.
0: Corresponding P0.n pin is not skipped by the Crossbar.
1: Corresponding P0.n pin is skipped by the Crossbar.
R/W
R/W
Bit6
Bit6
SFR Definition 18.5. P0MDOUT: Port0 Output Mode
SFR Definition 18.6. P0SKIP: Port0 Skip
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
Rev. 1.0
R/W
R/W
Bit3
Bit3
R/W
R/W
Bit2
Bit2
R/W
R/W
Bit1
Bit1
REF
SFR Address:
SFR Address:
input, external oscil-
R/W
R/W
Bit0
Bit0
0xA4
0xD4
00000000
Reset Value
00000000
Reset Value