c8051f410 Silicon Laboratories, c8051f410 Datasheet - Page 72

• Manufacturer Part Number: c8051f410
• Description: 2.0 V, 32/16 Kb Flash, Smartclock, 12-bit Adc
• Manufacturer: Silicon Laboratories

C8051F410/1/2/3
72
Bits 7–0: IDA0 Data Word Low-Order Bits.
Bit 7:
Bits 6–4: IDA1CM[2:0]: IDA1 Update Source Select Bits.
Bit 3:
Bit 2:
Bits 1–0: IDA1OMD[1:0]: IDA1 Output Mode Select Bits.
IDA1EN
R/W
R/W
Bit7
Bit7
For IDA0RJST = 0:
Bits 7-4 hold the least significant 4-bits of the 12-bit IDA0 Data Word. Bits 3–0 are 0000b.
For IDA0RJST = 1:
Bits 7–0 hold the least significant 8-bits of the 12-bit IDA0 Data Word.
IDA1EN: IDA0 Enable Bit.
0: IDA1 Disabled.
1: IDA1 Enabled.
000: DAC output updates on Timer 0 overflow.
001: DAC output updates on Timer 1 overflow.
010: DAC output updates on Timer 2 overflow.
011: DAC output updates on Timer 3 overflow.
100: DAC output updates on rising edge of CNVSTR.
101: DAC output updates on falling edge of CNVSTR.
110: DAC output updates on any edge of CNVSTR.
111: DAC output updates on write to IDA1H.
Reserved. Read = 0b, Write = 0b.
IDA1RJST: IDA1 Right Justify Select Bit.
0: IDA1 data in IDA1H:IDA1L is left justified.
1: IDA1 data in IDA1H:IDA1L is right justified.
00: 0.25 mA full-scale output current.
01: 0.5 mA full-scale output current.
10: 1.0 mA full-scale output current.
11: 2.0 mA full-scale output current.
R/W
R/W
Bit6
Bit6
SFR Definition 6.3. IDA0L: IDA0 Data Low Byte
IDA1CM
SFR Definition 6.4. IDA1CN: IDA1 Control
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
Rev. 1.0
R/W
R/W
Bit3
Bit3
-
IDA1RJST
R/W
Bit2
Bit2
R
R/W
R/W
Bit1
Bit1
IDA1OMD
SFR Address:
SFR Address:
R/W
R/W
Bit0
Bit0
0xB5
0x96
00000000
Reset Value
01110011
Reset Value