c8051f410 Silicon Laboratories, c8051f410 Datasheet - Page 84

• Manufacturer Part Number: c8051f410
• Description: 2.0 V, 32/16 Kb Flash, Smartclock, 12-bit Adc
• Manufacturer: Silicon Laboratories

C8051F410/1/2/3
The Comparator output can be polled in software, used as an interrupt source, internal oscillator suspend
awakening source and/or routed to a Port pin. When routed to a Port pin, the Comparator output is avail-
able asynchronous or synchronous to the system clock; the asynchronous output is available even in
STOP or SUSPEND mode (with no system clock active). When disabled, the Comparator output (if
assigned to a Port I/O pin via the Crossbar) defaults to the logic low state, and its supply current falls to
less than 100 nA. See
Comparator outputs via the digital Crossbar. Comparator inputs can be externally driven from -0.25 V to
(V
Table 9.1.
The Comparator response time may be configured in software via the CPTnMD registers (see SFR Defini-
tion 9.3 and SFR Definition 9.5). Selecting a longer response time reduces the Comparator supply current.
See Table 9.1 for complete timing and current consumption specifications.
84
P0.1
P0.3
P0.5
P0.7
P1.1
P1.3
P1.5
P1.7
P2.1
P2.3
P2.5
P2.7
DD
) + 0.25 V without damage or upset. The complete Comparator electrical specifications are given in
CMX1N3
CMX1N2
CMX1N1
CMX1N0
CMX1P3
CMX1P2
CMX1P1
CMX1P0
Figure 9.2. Comparator1 Functional Block Diagram
P0.0
P0.2
P0.4
P0.6
P1.0
P1.2
P1.4
P1.6
P2.0
P2.2
P2.4
P2.6
Section “18.1. Priority Crossbar Decoder” on page 149
CP1HYN1
CP1HYN0
CP1HYP1
CP1HYP0
CP1OUT
CP1RIF
CP1FIF
CP1EN
CP1 +
CP1 -
Rev. 1.0
+
-
VDD
GND
CPT1MD
(SYNCHRONIZER)
D
SET
CLR
Q
Q
D
CLR
SET
Q
Q
Rising-edge
for details on configuring
CP1
Crossbar
Interrupt
Logic
Falling-edge
Interrupt
CP1
CP1A
CP1
CP1