c8051f410 Silicon Laboratories, c8051f410 Datasheet - Page 71

• Manufacturer Part Number: c8051f410
• Description: 2.0 V, 32/16 Kb Flash, Smartclock, 12-bit Adc
• Manufacturer: Silicon Laboratories

Bit 7:
Bits 6–4: IDA0CM[2:0]: IDA0 Update Source Select Bits.
Bit 3:
Bit 2:
Bits 1:0: IDA0OMD[1:0]: IDA0 Output Mode Select Bits.
Bits 7–0: IDA0 Data Word High-Order Bits.
IDA0EN
R/W
R/W
Bit7
Bit7
IDA0EN: IDA0 Enable Bit.
0: IDA0 Disabled.
1: IDA0 Enabled.
000: DAC output updates on Timer 0 overflow.
001: DAC output updates on Timer 1 overflow.
010: DAC output updates on Timer 2 overflow.
011: DAC output updates on Timer 3 overflow.
100: DAC output updates on rising edge of CNVSTR.
101: DAC output updates on falling edge of CNVSTR.
110: DAC output updates on any edge of CNVSTR.
111: DAC output updates on write to IDA0H.
Reserved. Read = 0b, Write = 0b.
IDA0RJST: IDA0 Right Justify Select Bit.
0: IDA0 data in IDA0H:IDA0L is left justified.
1: IDA0 data in IDA0H:IDA0L is right justified.
00: 0.25 mA full-scale output current.
01: 0.5 mA full-scale output current.
10: 1.0 mA full-scale output current.
11: 2.0 mA full-scale output current.
For IDA0RJST = 0:
Bits 7-0 hold the most significant 8-bits of the 12-bit IDA0 Data Word.
For IDA0RJST = 1:
Bits 3-0 hold the most significant 4-bits of the 12-bit IDA0 Data Word. Bits 7-4 are 0000b.
R/W
R/W
Bit6
Bit6
SFR Definition 6.2. IDA0H: IDA0 Data High Byte
IDA0CM
SFR Definition 6.1. IDA0CN: IDA0 Control
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
Rev. 1.0
R/W
R/W
Bit3
Bit3
-
IDA0RJST
R/W
Bit2
Bit2
R
C8051F410/1/2/3
R/W
R/W
Bit1
Bit1
IDA0OMD
SFR Address:
SFR Address:
R/W
Bit0
R/W
Bit0
0xB9
0x97
Reset Value
01110011
00000000
Reset Value
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