km416rd8as Samsung Semiconductor, Inc., km416rd8as Datasheet - Page 4

• Manufacturer Part Number: km416rd8as
• Description: 128mbit Rdram 256k X 16 Bit X 2*16 Dependent Banks Direct Rdramtm For Consumer Package
• Manufacturer: Samsung Semiconductor, Inc.

KM416RD8AS
Overview
The Rambus Direct RDRAM™ is a general purpose high-
performance memory device suitable for use in a broad
range of applications including computer memory, graphics,
video, and any other application where high bandwidth and
low latency are required.
The 128Mbit Direct Rambus DRAMs (RDRAM ) ar
extremely high-speed CMOS DRAMs organized as 8M
words by 16 bits. The use of Rambus Signaling Level (RSL)
technology permits 800MHz transfer rates while using
conventional system and board design technologies. Direct
RDRAM devices are capable of sustained data transfers at
1.25 ns per two bytes (10ns per sixteen bytes).
The architecture of the Direct RDRAMs allows the highest
sustained bandwidth for multiple, simultaneous randomly
addressed memory transactions. The separate control and
data buses with independent row and column control yield
over 95% bus efficiency. The Direct RDRAM's thirty-two
banks support up to four simultaneous transactions.
System oriented features for mobile, graphics and large
memory systems include power management, byte masking.
Features
The 128Mbit Direct RDRAMs are offered in a CSP hori-
zontal package suitable for desktop as well as low-profile
add-in card and mobile applications.
Direct RDRAMs operate from a 2.5 volt supply.
Highest sustained bandwidth per DRAM device
Low latency features
Advanced power management:
Organization: 1Kbyte pages and 32 banks, x 16
Uses Rambus Signaling Level (RSL) for up to 800MHz
- 1.6GB/s sustained data transfer rate
- Separate control and data buses for maximized
- Separate row and column control buses for
- 32 banks: four transactions can take place simul-
- Write buffer to reduce read latency
- 3 precharge mechanisms for controller flexibility
- Interleaved transactions
- Multiple low power states allows flexibility in power-
consumption versus time to transition to active state
- Power-down self-refresh
operation
efficiency
easy scheduling and highest performance
taneously at full bandwidth data rates
Page 1
Key Timing Parameters/Part Numbers
a.The “32s"designation indicates that this RDRAM core is composed of 32
banks which use a "split" bank architecture.
b.The “R"designation indicates that this RDRAM core uses Normal Power
Self Refresh.
c.The “S"designation indicates that this RDRAM core uses Low Power Self
Refresh.
256Kx16x32s
Figure 1: Direct RDRAM Consumer CSP Package
Organization
a
Binning
-RM80
-SM80
KM4xx
KM416RD8AS-RK80
SEC KOREA
SEC KOREA
Freq.
MHz
Speed
800
800
I/O
Rev. 0.9 July 1999
t
Time) ns
Target
Direct RDRAM
rac
Access
RD8AC
40
40
(Row
KM416RD8AS-R
KM416RD8AS-S
Part Number
b
c
M80
M80
™