km416rd8as Samsung Semiconductor, Inc., km416rd8as Datasheet - Page 47

• Manufacturer Part Number: km416rd8as
• Description: 128mbit Rdram 256k X 16 Bit X 2*16 Dependent Banks Direct Rdramtm For Consumer Package
• Manufacturer: Samsung Semiconductor, Inc.

KM416RD8AS
Electrical Conditions
Timing Conditions
Symbol
T
V
V
v
V
V
V
V
V
V
A
V
V
V
V
V
V
Symbol
t
t
t
t
t
t
tS, tH
t
t
CYCLE
CR
CH
TR
DCW
DR
DR1,
DR2,
DD,N,
J
DD,
DD,N,
CMOS
TERM
REF
DIL
DIH
DIS
DI
X
CM
CIS,CTM
CIS,CFM
IL,CMOS
IH,CMOS
, t
, t
, t
CF
CL
DF
t
t
V
DF1
DF2
v
DDA
V
DDA,N
DDA,N
Parameter
CTM and CFM cycle times (-800)
CTM and CFM input rise and fall times
CTM and CFM high and low times
CTM-CFM differential (MSE/MS=0/0)
Domain crossing window
DQA/DQB/ROW/COL input rise/fall times
DQA/DQB/ROW/COL-to-CFM setup/hold @ tCYCLE=2.5ns
SIO0, SIO1 input rise and fall times
CMD, SCK input rise and fall times
Parameter and Conditions
Junction temperature under bias
Supply voltage
Supply voltage droop (DC) during NAP interval (t
Supply voltage ripple (AC) during NAP interval (t
Supply voltage for CMOS pins (2.5V controllers)
Supply voltage for CMOS pins (1.8V controllers)
Termination voltage
Reference voltage
RSL data input - low voltage
RSL data input - high voltage
RSL data input swing: V
RSL data asymmetry: A
RSL clock input - crossing point of true and complement signals
RSL clock input - common mode V
RSL clock input swing: V
RSL clock input swing: V
CMOS input low voltage
CMOS input high voltage
DI
DIS
CIS
CIS
= [(V
= V
= V
= V
Table 18: Electrical Conditions
DIH
DIH
CIH
CIH
Table 19: Timing Conditions
CM
- V
- V
- V
- V
= (V
DIL
REF
CIL
CIL
) + (V
CIH
(CTM,CTMN pins).
(CFM,CFMN pins).
+V
Page 44
DIL
NLIMIT
NLIMIT
CIL)
- V
/2
REF
)
)
)]/V
DIS
0.250
Min
40%
-0.1
2.5
0.2
0.0
0.2
-
-
V
CMOS
V
V
1.6 - 0.12
2.0 - 0.1
REF
REF
Min
2.50
2.50
1.80
- 0.3
-2.0
0.6
1.5
1.6
0.6
0.6
-5
0
/2 + 0.25
-
+ 0.3
- 0.5
0.250
Max
2.56
60%
0.65
0.5
0.5
0.1
5.0
2.0
Target
Direct RDRAM
Rev. 0.9July 1999
V
CMOS
V
2.50 + 0.25
V
V
2.50 + 0.2
1.80 + 0.2
1.6 + 0.12
t
t
t
2.0 + 0.1
CMOS
CYCLE
CYCLE
CYCLE
REF
REF
Unit
Max
0.70
0.70
ns
ns
ns
ns
ns
ns
2.0
2.0
1.0
2.0
1.9
90
5
/2 - 0.25
+ 0.5
- 0.3
+0.3
Figure(s)
Figure 53
Figure 53
Figure 53
Figure 42
Figure 59
Figure 54
Figure 54
Figure 56
Figure 56
Unit
%
%
%
V
V
V
V
V
V
V
V
V
V
V
V
V
V
C
™