km416rd8as Samsung Semiconductor, Inc., km416rd8as Datasheet - Page 55

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km416rd8as

Manufacturer Part Number
km416rd8as
Description
128mbit Rdram 256k X 16 Bit X 2*16 Dependent Banks Direct Rdramtm For Consumer Package
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
KM416RD8AS
CMOS - Transmit Timing
Figure 58 is a timing diagram which shows the detailed
requirements for the CMOS output signals. The SIO0 signal
is driven once per t
SCK
SIO0
SIO0
SIO1
or
SIO1
SIO0
or
t
t
CYCLE1
QF1
DF1
t
t
Q1,MAX
QF1
interval on the falling edge. The
Figure 58: CMOS Timing - Data Signals for Transmit
t
PROP1,MAX
Page 52
clock-to-output window is t
SIO0 timing points are measured at the 50% level. The rise
and fall times of SIO0 are t
20% and 80% levels.
t
PROP1,MIN
t
Q1,MIN
QR1
Q1,MIN
Target
Direct RDRAM
Rev. 0.9July 1999
and t
t
t
QR1
DR1
/t
Q1,MAX.
QF1
t
QR1
, measured at the
The SCK and
V
V
V
V
V
V
V
V
OH,CMOS
OH,CMOS
OL,CMOS
OL,CMOS
IH,CMOS
IH,CMOS
IL,CMOS
IL,CMOS
80%
50%
20%
80%
50%
20%
80%
50%
20%
80%
50%
20%

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