am79c974 Advanced Micro Devices, am79c974 Datasheet - Page 32

• Manufacturer Part Number: am79c974
• Description: Pcnettm-scsi Combination Ethernet And Scsi Controller For Pci Systems
• Manufacturer: Advanced Micro Devices

Bus Master DMA Transfers
There are four primary types of DMA transfers. The
Am79C974 controller uses non-burst as well as burst
cycles for read and write access to the main memory.
Basic Non-Burst Read Cycles
All Am79C974 controller non-burst read accesses are of
the PCI command type Memory Read (type 6). Note that
during all non-burst read operations, the Am79C974
controller will always activate all byte enables, even
though some byte lanes may not contain valid data as
32
AMD
DEVSEL
FRAME
TRDY
IRDY
C/BE
REQ
GNT
CLK
PAR
AD
1
DEVSEL is sampled by the Am79C974 controller.
Figure 6. Non-Burst Read Cycles With Wait States
2
3
P R E L I M I N A R Y
ADDR
0110
Am79C974
4
PAR
indicated by a buffer pointer value. In such instances,
the Am79C974 controller will internally discard un-
needed bytes.
Figure 6 shows a typical non-burst read access. The
Am79C974 controller asserts IRDY at clock 5 immedi-
ately after the address phase and starts sampling
DEVSEL. The target extends the cycle by asserting
DEVSEL not until clock 6. Additionally, the target inserts
one wait state by asserting its ready (TRDY) at clock 8.
5
0000
6
7
DATA
8
PAR
9
18681A-10