am79c974 Advanced Micro Devices, am79c974 Datasheet - Page 65

• Manufacturer Part Number: am79c974
• Description: Pcnettm-scsi Combination Ethernet And Scsi Controller For Pci Systems
• Manufacturer: Advanced Micro Devices

Note that when I/O resource width is defined as 32 bits
(DWIO mode), the upper 16 bits of the I/O resource is
reserved and written as ZEROS and read as undefined,
except for the APROM locations and CSR88 . The
APROM locations and CSR88 are the only I/O re-
sources for which all 32 bits will have defined values.
However, this is true only when the Am79C974 control-
ler is in DWIO mode.
Configuring the Am79C974 controller for DWIO mode is
accomplished whenever there is any attempt to perform
a 32-bit write access to the RDP location (offset 10h).
See the DWIO section for more details.
TYPE
WR
WR
WR
RD
RD
RD
RD
RD
RD
RD
BE[3:0]
0000
1100
0011
1110
1101
1011
0111
0000
1100
0011
[31:24]
undef
undef
undef
undef
undef
data
data
data
data
data
AD
[23:16]
undef
undef
undef
undef
undef
data
data
data
data
data
AD
Table 4. Bus Slave Accesses
P R E L I M I N A R Y
[15:8]
undef
undef
undef
copy
copy
data
data
data
data
data
AD
Am79C974
undef
undef
undef
[7:0]
copy
copy
data
data
data
data
data
AD
Table 4 describes all possible bus slave accesses that
may be directed toward the Am79C974 controller. (i.e.,
the Am79C974 controller is the target device during the
transfer.) The first column indicates the type of slave ac-
cess. RD stands for READ, WR for a WRITE operation.
The second column indicates the value of the C/BE[3:0]
lines during the data phase of the transfer. The four byte
columns (AD[31:24], AD[23:16], AD[15:8], AD[7:0]) in-
dicate the value on the address/data bus during the data
phase of the access. “data” indicates the position of the
active bytes; “copy” indicates the positions of copies of
the active bytes; “undef” indicates byte locations that are
undefined during the transfer.
DWORD access to DWORD address, e.g. 300h,
30Ch, 310h (DWIO mode only)
word access to even word address, e.g. 300h,
30Ch, 310h (WIO mode only)
word access to odd word address, e.g. 302h, 30Eh,
312h (WIO mode only)
byte access to lower byte of even word address, e.g.
300h, 304h (WIO mode only, APROM accesses
only)
byte access to upper byte of even word address,
e.g. 301h, 305h (WIO mode only, APROM accesses
only)
byte access to lower byte of odd word address, e.g.
302h, 306h (WIO mode only, APROM accesses
only)
byte access to upper byte of odd word address, e.g.
303h, 307h (WIO mode only, APROM accesses
only)
DWORD access to DWORD address, e.g. 300h,
30Ch, 310h (DWIO mode only)
word access to even word address, e.g. 300h,
30Ch, 310h (WIO mode only)
word access to odd word address, e.g. 302h, 30Eh,
312h (WIO mode only)
Comments
AMD
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