am79c974 Advanced Micro Devices, am79c974 Datasheet - Page 37

• Manufacturer Part Number: am79c974
• Description: Pcnettm-scsi Combination Ethernet And Scsi Controller For Pci Systems
• Manufacturer: Advanced Micro Devices

Transaction Termination
Termination of a PCI transaction may be initiated by
either the master or the target. During termination, the
master remains in control to bring all PCI transactions to
an orderly and systematic conclusion regardless of what
caused the termination. All transactions are concluded
when FRAME and IRDY are both deasserted, indicating
an IDLE cycle.
Target Initiated Termination
When the Am79C974 controller is a bus master, the cy-
cles it produces on the PCI bus may be terminated by
the target in one of three different ways: Disconnect with
data transfer, disconnect without data transfer, and tar-
get abort.
DEVSEL
FRAME
TRDY
STOP
IRDY
C/BE
REQ
GNT
PAR
CLK
AD
1
DEVSEL is sampled by the Am79C974 controller.
ADDR i
0111
2
DATA
PAR
Figure 11. Disconnect with Data Transfer
3
0000
DATA
PAR
4
P R E L I M I N A R Y
PAR
Am79C974
5
Disconnect With Data Transfer
Figure 11 shows a disconnection in which one last data
transfer occurs after the target asserted STOP. STOP is
asserted on clock 4 to start the termination sequence.
Data is still transferred during this cycles, since both
IRDY and TRDY are asserted. The Am79C974 control-
ler terminates the current transfer with the deassertion
of FRAME on clock 5 and then one clock cycle later with
the deassertion of IRDY. It finally releases the bus on
clock 6. The Am79C974 controller will re-request the
bus after 2 clock cycles, if it wants to transfer more data.
The starting address of the new transfer will be the ad-
dress of the next untransferred data.
6
7
8
9
10
ADDR +8
0111
11
i
18681A-15
AMD
37