am79c974 Advanced Micro Devices, am79c974 Datasheet - Page 68

• Manufacturer Part Number: am79c974
• Description: Pcnettm-scsi Combination Ethernet And Scsi Controller For Pci Systems
• Manufacturer: Advanced Micro Devices

EEPROM MAP
The automatic EEPROM read operation will access 18
words (i.e. 36 bytes) of the EEPROM. The format of the
Note that the first bit out of any WORD location in the
EEPROM is treated as the MSB of the register that is be-
ing programmed. For example, the first bit out of
EEPROM WORD location 08h will be written into
BCR16[15], the second bit out of EEPROM WORD loca-
tion 08h will be written into BCR16[14], etc.
There are two checksum locations within the EEPROM.
The first is required for the EEPROM address. This
checksum will be used by AMD driver software to verify
that the ISO 8802-3 (IEEE/ANSI 802.3) station address
68
EEPROM
EEPROM
Address
address)
(lowest
WORD
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
10h
11h
AMD
Addr.
Byte
0Dh
1Dh
01h
03h
05h
07h
09h
0Bh
0Fh
11h
13h
15h
17h
19h
1Bh
1Fh
21h
23h
2nd byte of the ISO 8802-3
(IEEE/ANSI 802.3) station physical
address for this node
4th byte of the node address
6th byte of the node address
reserved location: must be 00h
Hardware ID: must be 11h if
compatibility to AMD drivers is
desired
user programmable space
MSByte of two-byte checksum,
which is the sum of bytes 00h–0Bh
and bytes 0Eh and 0Fh
must be ASCII “W” (57h) if compatibility
to AMD driver software is desired
BCR16[15:8] (not used)
BCR17[15:8] (not used)
BCR18[15:8] (Burst Size and Bus Control)
BCR2[15:8] (Misc. configuration)
BCR21[15:8] (Not Used)
reserved location must be 00h
reserved location must be 00h
checksum adjust byte for the first 36 bytes
of the EEPROM contents; checksum of the
first 36 bytes of the EEPROM should total
to FFh
reserved location must be 00h
user programmable byte locations
Most Significant Byte
Table 5. EEPROM Contents
P R E L I M I N A R Y
Am79C974
EEPROM Contents
EEPROM contents is shown in Table 5, beginning with
the byte that resides at the lowest EEPROM address:
has not been corrupted. The value of bytes 0Ch and 0Dh
should match the sum of bytes 00h through 0Bh and
0Eh and 0Fh. The second checksum location – byte
1Fh – is not a checksum total, but is, instead, a check-
sum adjustment. The value of this byte should be such
that the total checksum for the entire 36 bytes of
EEPROM data equals the value FFh. The checksum ad-
just byte is needed by the Am79C974 controller in order
to verify that the EEPROM contents have not been
corrupted.
Addr.
Byte
0Ch
1Ch
00h
02h
04h
06h
08h
0Ah
0Eh
10h
12h
14h
16h
18h
1Ah
1Eh
20h
22h
first byte of the ISO 8802-3
(IEEE/ANSI 802.3) station physical
address for this node, where “first byte”
refers to the first byte to appear on the
802.3 medium
3rd byte of the node address
5th byte of the node address
reserved location must be 00h
reserved location must be 00h
user programmable space
LSByte of two-byte checksum, which is the
sum of bytes 00h–0Bh and bytes 0Eh and 0Fh
must be ASCII “W” (57h) if compatibility
to AMD driver software is desired
BCR16[7:0] (not used)
BCR17[7:0] (not used)
BCR18[7:0] (Burst Size and Bus Control)
BCR2[7:0] (Misc. configuration)
BCR21[7:0] (Not Used)
reserved location must be 00h
reserved location must be 00h
reserved location must be 00h
reserved location must be 00h
user programmable byte locations
Least Significant Byte