SAA7385GP Philips Semiconductors, SAA7385GP Datasheet - Page 26

• Manufacturer Part Number: SAA7385GP
• Description: Error correction and host interface IC for CD-ROM SEQUOIA
• Manufacturer: Philips Semiconductors

Philips Semiconductors
Table 25 RDJMPRS field description
Table 26 General purpose bits: 0xF0C2; note 1
Note
1. Register 0xF0C2 controls the direction and output state of the general purpose I/O bits on the SAA7385. Reading
Table 27 GPIOCTL field description
1996 Jun 19
JUMPER7 to JUMPER0
GPDIR1
GPDAT1
GPDIR2
GPDAT2
GPDIR3
GPDAT3
GPDIR4
GPDAT4
MNEMONIC
GPIOCTL
Error correction and host interface IC for
CD-ROM (SEQUOIA)
the GPIO direction bits reflects the last value that was written to the register. The four GPIO data bits shows the
current value of the input signals in the input mode. In the output mode, the last value written to the output latches is
that which is read back.
FIELD
FIELD
General purpose bit direction control. Default LOW puts GPIO1 into the input mode, setting this HIGH
puts GPIO1 in output mode.
GPIO1 data bit.
General purpose bit direction control. Default LOW puts GPIO2 into the input mode, setting this HIGH
puts GPIO2 in output mode.
GPIO2 data bit.
General purpose bit direction control. Default LOW puts GPIO3 into the input mode, setting this HIGH
puts GPIO3 in output mode.
GPIO3 data bit.
General purpose bit direction control. Default LOW puts GPIO4 into the input mode, setting this HIGH
puts GPIO4 in output mode.
GPIO4 data bit.
R/W
R/W
GPDAT4
Indicates the value of the DRAM data bus on power-up. The data bus may be pulled HIGH
or LOW using weak pull-ups and pull-downs hence up to eight jumper settings are
accommodated.
7
GPDIR4
6
GPDAT3
5
26
DESCRIPTION
GPDIR3
4
DATA BYTE
DESCRIPTION
GPDAT2
3
GPDIR2
2
Preliminary specification
GPDAT1
1
SAA7385
GPDIR1
0