SAA7385GP Philips Semiconductors, SAA7385GP Datasheet - Page 41

• Manufacturer Part Number: SAA7385GP
• Description: Error correction and host interface IC for CD-ROM SEQUOIA
• Manufacturer: Philips Semiconductors

Philips Semiconductors
Table 65 SEQSTP field descriptions
Table 66 FIFO flags and synchronous offset register: 0xF0AF - 53CF94 address 0x07; note 1
Note
1. The field description for the FIFO flags register is shown in Table 67.
Table 67 FIFOFLG field descriptions
Table 68 Configuration registers: 0xF0B4, F0B7, F0BC and F0BD - 53CD94 addresses 0x08, 0B, 0C and 0D; note 1
Note
1. The registers described allows the controller to be configured for the specific mode of operation.
1996 Jun 19
SS2 to SS0
SOM
TRANSPERIOD Synchronous transfer period. Specifies minimum time between successive REQ or ACK pulses.
FF
SS
SYNCOFFSET
Error correction and host interface IC for
CD-ROM (SEQUOIA)
MNEMONIC
MNEMONIC
CONFIG1
CONFIG2
CONFIG3
CONFIG4
FIFOFLG
FIFOFLG
FIELD
FIELD
Sequence step. Counter increments at various points in a command; may be used for error
recovery.
Synchronous offset maximum. When clear, the synchronous offset has reached the maximum
value.
number of bytes in the FIFO
duplicates of sequence step register
controls handshaking in synchronous transfer mode
R/W
R/W
R/W
R/W
R/W
R/W
W
R
SLOW
IMRC
SS2
RFB
7
7
SRD
QTE
SS1
FE
6
6
PTEST
CDB10
EBC
SS0
SYNCOFFSET7 to SYNCOFFSET0
5
5
41
DESCRIPTION
DESCRIPTION
FSCSI
PCHK
DHZ
FF4
DATA BYTE
4
DATA BYTE
4
CTEST
SCSI2
FCLK
FF3
3
3
SRB
EAN
BPA
FF2
MYBUSID2 to MYBUSID0
2
2
Preliminary specification
ADMA
TEST
RPE
FF1
1
1
SAA7385
BBTE
DPE
FF0
T8
0
0