SAA7385GP Philips Semiconductors, SAA7385GP Datasheet - Page 30

• Manufacturer Part Number: SAA7385GP
• Description: Error correction and host interface IC for CD-ROM SEQUOIA
• Manufacturer: Philips Semiconductors

Philips Semiconductors
Table 38 DRAM selection/test mode: 0xF0FE; note 1
Note
1. After power-up or reset, DRAMSEL should be the first register that is programmed. This register is used to select the
Table 39 SCSIMOD field description
1996 Jun 19
2_DRAMS
1_MEG
DBL_SPD
RESTEST3
RESTEST0
TEST
MNEMONIC
DRAMSEL
Error correction and host interface IC for
CD-ROM (SEQUOIA)
number and the type of DRAMs used. The output of this register is used to control the DRAM access directly and will
affect any current DRAM cycle.
FIELD
to
LOGIC
R/W
R/W
0
1
0
1
0
1
0
1
single DRAM used
two DRAMs used
256 k
1 M
single speed refresh; condition after reset
double speed refresh; only set if system is running at 0.5 master clock speed
reserved for test: enable DRAM access test; switch multiplexer control, enable interrupts
normal operation
test mode; read back of RESTEST3 to RESTEST0 is gated by this bit
TEST
7
6
RESTEST3 to RESTEST0
5
30
DESCRIPTION
4
DATA BYTE
3
DBL_SPD
2
Preliminary specification
1_MEG
1
SAA7385
2_DRAMS
0