SAA7385GP Philips Semiconductors, SAA7385GP Datasheet - Page 38

• Manufacturer Part Number: SAA7385GP
• Description: Error correction and host interface IC for CD-ROM SEQUOIA
• Manufacturer: Philips Semiconductors

Philips Semiconductors
Table 54 SCSI offset end registers (A and B): 0xF0EA, F0EB; note 1
Note
1. These registers together with the offset start registers, allow full control over the number of frame bytes that will be
Table 55 SCSI transfer start frame number: 0xF0EC, F0ED; note 1
Note
1. This register determines the starting frame number for an SCSI transfer. The outputs of the registers are used to
Table 56 SCSI current transfer frame: 0xF0EE, F0EF; note 1
Note
1. This register allows the current SCSI frame transfer number to be read.
11.5
The following bandwidth limitation must be observed in normal operation:
If two SCSI offset pairs are used, the A start must be written last to ensure that the correct offset start address is loaded
into the counter.
In the two SCSI offset mode, reading the register after loading is not possible due to the automatic switching feature.
1996 Jun 19
MNEMONIC
MNEMONIC
MNEMONIC
All burst mode operations (SCSI and ECC) take twice as long in nibble mode, and single cycle operations take 60%
longer; 236 ns compared with 147.5 ns. For this reason, operation of the DRAM interface at the maximum 8 times
transfer rate in nibble mode is not supported.
In byte mode, only 833 ns is available between each data write from the front-end at the maximum 8 times transfer
rate. At the end of the frame, multiple front-end byte writes may stack up and therefore it is recommended that the
80C32 avoids DRAM access at the end of the frame.
Error correction and host interface IC for
CD-ROM (SEQUOIA)
SCSISFRM
SCSISFRM
SCSICFRM
SCSICFRM
SCSIOFFE
SCSIOFFE
transferred to the SCSI port.
directly control DRAM access cycles, and will affect any current DRAM cycle in progress. The SCSI frame pointer
will wrap back to this point.
Miscellaneous buffer manager considerations
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
NUM7
NUM7
7
7
7
NUM6
NUM6
6
6
6
NUM5
NUM5
5
5
5
38
OFFSET7 to OFFSET0
NUM4
NUM4
4
4
4
DATA BYTE
DATA BYTE
DATA BYTE
NUM3
NUM3
3
3
3
OFFSET11 to OFFSET8
NUM2
NUM2
2
2
2
Preliminary specification
NUM1
NUM1
1
1
1
SAA7385
NUM0
NUM8
NUM0
NUM8
0
0
0