SAA7385GP Philips Semiconductors, SAA7385GP Datasheet - Page 6

• Manufacturer Part Number: SAA7385GP
• Description: Error correction and host interface IC for CD-ROM SEQUOIA
• Manufacturer: Philips Semiconductors

Philips Semiconductors
1996 Jun 19
RAS
CAS
DWR
DOE
V
DD0
DD1
DD2
DD3
V
DD4
DD5
DD6
DD7
V
LED
TRAYSW
EJECT
LQDATA
LWCLK
V
SCLK
V
SYSRES
CFLAG
CPR
SPR
SKIPFWD
SKIPBACK
SCSICLK
V
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
V
LA0
SS2
DD2
SS3
SS4
SS5
DD3
SS6
Error correction and host interface IC for
CD-ROM (SEQUOIA)
SYMBOL
PIN
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
11
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
4 mA, Schmitt, PD25 DRAM data bus; bit DD0
4 mA, Schmitt, PD25 DRAM data bus; bit DD1
4 mA, Schmitt, PD25 DRAM data bus; bit DD2
4 mA, Schmitt, PD25 DRAM data bus; bit DD3
4 mA, Schmitt, PD25 DRAM data bus; bit DD4
4 mA, Schmitt, PD25 DRAM data bus; bit DD5
4 mA, Schmitt, PD25 DRAM data bus; bit DD6
4 mA, Schmitt, PD25 DRAM data bus; bit DD7
24 mA, CMOS test
CMOS S2, PU25
Schmitt, PU400
Schmitt, PU25
Schmitt, PU25
Schmitt, PU25
Schmitt, PU25
2 mA, PU25
S4, Schmitt
S4, Schmitt
S4, Schmitt
S4, Schmitt
S4, Schmitt
S4, Schmitt
S4, Schmitt
S4, Schmitt
standard
Schmitt
2 mA
2 mA
2 mA
2 mA
PAD
S4
S4
S4
S4
DRAM row address section; active LOW
DRAM column address selection; active LOW
DRAM write; active LOW
DRAM output enable; active LOW
ground 2
power supply 2
ground 3
panel LED; active LOW; WTGCTL(4)
active LOW when tray is in
opens tray; active LOW
serial data to DAC
word strobe to DAC
ground 4
data serial clock
ground 5
system reset; OR of POR, SCSIRST and watch-dog timer
C1 and C2 status
S2B interface ready to accept data; active LOW
S2B interface ready to send data; active LOW
skip forwards; active LOW; RDSW(3)
skip backwards; active LOW; RDSW(2)
SCSI interface clock
power supply 3
microcontroller multiplexed data bus; bit AD0
microcontroller multiplexed data bus; bit AD1
microcontroller multiplexed data bus; bit AD2
microcontroller multiplexed data bus; bit AD3
microcontroller multiplexed data bus; bit AD4
microcontroller multiplexed data bus; bit AD5
microcontroller multiplexed data bus; bit AD6
microcontroller multiplexed data bus; bit AD7
ground 6
EPROM latched lower address; bit LA0
6
DESCRIPTION
Preliminary specification
SAA7385