SAA7385GP Philips Semiconductors, SAA7385GP Datasheet - Page 50

• Manufacturer Part Number: SAA7385GP
• Description: Error correction and host interface IC for CD-ROM SEQUOIA
• Manufacturer: Philips Semiconductors

Philips Semiconductors
15.3
The data from sub-code R-W may be read via the V4 pin
from the CD-decoder and has a format similar to RS232.
The sub-code synchronization word is formatted by a
pause of 200 s minimum. Each sub-code byte starts with
a logic 1 followed by seven bits (Q to W). The gap between
bytes is variable between 1.3 and 90 s.
1996 Jun 19
handbook, full pagewidth
handbook, full pagewidth
Error correction and host interface IC for
CD-ROM (SEQUOIA)
R-W timing (see Fig.15)
W96
200 s min
Fig.15 Sub-code formatting and timing from the V4 pin.
11.3
F1
s
1
F2
Fig.16 C-flag output timing.
11.3
Q1
s
F3
R1
F4
S1
50
F5
15.4
A 1-bit flag signal is input to the CFLAG pin. This signal
shows the status of the error corrector and interpolator and
is updated every frame.
T1
F6
U1
F7
C-flag timing (see Fig.16)
V1
(nominal speed)
W1
45.4 s
11.3 s min
90 s max
MGE402
Preliminary specification
MGE401
1
SAA7385