ADC08D1000DEV NSC [National Semiconductor], ADC08D1000DEV Datasheet - Page 31

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ADC08D1000DEV

Manufacturer Part Number
ADC08D1000DEV
Description
High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter
Manufacturer
NSC [National Semiconductor]
Datasheet
a Configuration Register in the Extended Control mode, as
explained in Section 1.2.
Differential input signals up to the chosen full-scale level will
be digitized to 8 bits. Signal excursions beyond the full-scale
range will be clipped at the output. These large signal excur-
sions will also activate the OR output for the time that the
signal is out of range. See 2.2.2 Out Of Range (OR) Indica-
tion.
One extra feature of the V
the common mode voltage level of the LVDS outputs. The
output offset voltage (V
pin is used as an output or left unconnected. To raise the
LVDS offset voltage to a typical value of 1200mV the V
can be connected directly to the supply rails.
2.2 THE ANALOG INPUT
The analog input is a differential one to which the signal
source may be a.c. coupled or d.c. coupled. In the normal
mode, the full-scale input range is selected using the FSR pin
as specified in the Converter Electrical Characteristics. In the
Extended Control mode, the full-scale input range is selected
by programming the Full-Scale Voltage Adjust register
through the Serial Interface. For best performance when ad-
justing the input full-scale range in the Extended Control, refer
to ??1.4. for guidelines on limiting the amount of adjustment.
Table 5 gives the input to output relationship with the FSR pin
high and the normal (non-extended) mode is used. With the
FSR pin grounded, the millivolt values in Table 5 are reduced
to 75% of the values indicated. In the Enhanced Control
Mode, these values will be determined by the full scale range
and offset settings in the Control Registers.
The buffered analog inputs simplify the task of driving these
inputs and the RC pole that is generally used at sampling ADC
inputs is not required. If it is desired to use an amplifier circuit
before the ADC, use care in choosing an amplifier with ade-
quate noise and distortion performance and adequate gain at
the frequencies used for the application.
Note that a precise d.c. common mode voltage must be
present at the ADC inputs. This common mode voltage,
V
and the input signal is a.c. coupled to the ADC.
When the inputs are a.c. coupled, the V
grounded, as shown in Figure 11. This causes the on-chip
V
50k-Ohm resistors.
IMPORTANT NOTE: An Analog input channel that is not used
(e.g. in DES Mode) should be left floating when the inputs are
a.c. coupled. Do not connect an unused analog input to
ground.
CMO
CMO
V
V
V
V
CM
CM
CM
CM
, is provided on-chip when a.c. input coupling is used
TABLE 5. DIFFERENTIAL INPUT TO OUTPUT
voltage to be connected to the inputs through on-chip
− 217.5mV
+ 217.5mV
− 109 mV
+ 109 mV
V
V
(Non-Extended Control Mode, FSR High)
IN
CM
+
V
V
RELATIONSHIP
V
V
CM
CM
OS
CM
CM
BG
) is typically 800mV when the V
+ 217.5mV
− 217.5mV
+ 109 mV
V
−109 mV
V
pin is that it can be used to raise
IN
CM
CMO
Output Code
0111 1111 /
1100 30000
0000 0000
0100 0000
1000 0000
1111 1111
output must be
BG
pin
BG
31
When the d.c. coupled mode is used, a common mode volt-
age must be provided at the differential inputs. This common
mode voltage should track the V
V
mon mode output of the driving device should track this
change.
IMPORTANT NOTE: An analog input channel that is not used
(e.g. in DES Mode) should be tied to the V
the inputs are d.c. coupled. Do not connect unused analog
inputs to ground.
Full-scale distortion performance falls off rapidly as the
input common mode voltage deviates from V
a direct result of using a very low supply voltage to min-
imize power. Keep the input common voltage within 50
mV of V
Performance is as good in the d.c. coupled mode as it is
in the a.c. coupled mode, provided the input common
mode voltage at both analog inputs remain within 50 mV
of V
If d.c. coupling is used, it is best to servo the input common
mode voltage, using the V
formance. An example of this type of circuit is shown in Figure
12.
One such circuit should be used in front of the V
another in front of the V
R
gained up by the amplifier, the input common mode voltage
is equal to V
the bypass capacitor to isolate the input signal from V
R
pacitor "C" in Figure 12 should be chosen to keep any com-
ponent of the input signal from affecting V
Be sure that the current drawn from the V
exceed 100 μA.
FIGURE 12. Example of Servoing the Analog Input with
CMO
D3
IN
, R
CMO
are used to divide the V
output potential will change with temperature. The com-
D2
.
CMO
and R
FIGURE 11. Differential Input Drive
.
CMO
D3
from the ADC. R
will divide the input signal, if necessary. Ca-
IN
− input. In that figure, R
CMO
V
CMO
CMO
pin, to maintain optimum per-
CMO
potential so that, after being
D1
and R
output pin. Note that the
20097444
CMO
D2
CMO
CMO
are split to allow
output does not
.
voltage when
IN
CMO
www.national.com
D1
+ input and
, R
. This is
20097455
D2
CMO
and
.

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