ADSP-BF542 AD [Analog Devices], ADSP-BF542 Datasheet - Page 24

• Manufacturer Part Number: ADSP-BF542
• Description: Embedded Processor
• Manufacturer: AD [Analog Devices]

ADSP-BF542/4/7/8/9
Table 11. Pin Multiplexing
1
2
3
ADSP-BF542/4/7/8/9 processor pin definitions are listed in
Table
Primary Pin
Function
(Number of
Pins)
Port G
GPIO (16 pins)
Port H
GPIO (14 pins)
Port I
GPIO (16 pins)
Port J
GPIO (14 pins)
Port connections may be inputs or outputs after power up depending on BF54x family member number and boot mode chosen.
All Port connections always power up as inputs for some period of time and require resistive termination to a safe condition if used as outputs in the system.
A total of 32 interrupts at once are available from Ports C through J, configurable in byte-wide blocks.
1
12. To see the pin multiplexing scheme, see
,
2
First Peripheral
Function
EPPI0 CLK,FS (3 pins)
DATA 16–17 (2 pins)
SPI1 SEL1–3 (3 pins)
SPI1 (4 pins)
CAN0 (2 pins)
CAN1 (2 pins)
UART1 (2 pins)
ATAPI_RST (1 pin)
HOST_ADDR (1 pin)
HOST_ACK (1 pin)
MXVR MRX, MTX,
MRXON (3 pins)
Async Addr10–25
(16 pins)
Async CTL and MISC
Second Peripheral
Function
TMRCLK (1 pin)
Host CTL (3 pins)
MXVR MTXON (1 pin)
EPPI0-1_FS3 (2 pins)
TMR8 (1 pin)
TMR9 (1 pin)
TMR10 (1 pin)
AMC Addr 4-9 (6 pins)
Rev. PrG | Page 24 of 82 | December 2007
Table
11.
Third Peripheral
Function
TACI1 (1 pin)
EPPI2_FS3 (1 pin)
Counter Down/Gate
Counter Up/Dir
(1 pin)
EPPI2 CLK,FS (3 pins)
TACI4-5 (2 pins)
DMAR 0–1 (2 pins)
(1 pin)
Fourth Peripheral
Function
CZM (1 pin)
TACI8-10 (3 shared
pins)
TACLK8-10 (3 shared
pins)
HWAIT
Preliminary Technical Data
Interrupt Capability
Interrupts (8 pins)
Interrupts (8 pins)
Interrupts (8 pins)
Interrupts (6 pins)
Interrupts (8 pins)
Interrupts (8 pins)
Interrupts (8 pins)
Interrupts (6 pins)