ADSP-BF542 AD [Analog Devices], ADSP-BF542 Datasheet - Page 30

• Manufacturer Part Number: ADSP-BF542
• Description: Embedded Processor
• Manufacturer: AD [Analog Devices]

ADSP-BF542/4/7/8/9
Table 12. Pin Descriptions (Continued)
Pin Name
Memory Interface (Continued)
DDR_VREF
DDR_VSSR
Asynchronous Memory Interface
A1-3
D0-15/ND_D0-15/ATAPI_D0-15
AMS0–3
ABE0 /ND_CLE
ABE1/ND_ALE
AOE/NR_ADV
ARE
AWE
ATAPI Controller Pins
ATAPI_PDIAG
High Speed USB OTG Pins
USB_DP
USB_DM
USB_XI
USB_XO
USB_ID
USB_VBUS
USB_VREF
USB_RSET
MXVR (MOST) Interface
MFS
MLF_P
MLF_M
MXI
MXO
Mode Control Pins
BMODE0–3
JTAG Port Pins
TDI
TDO
TRST
TMS
TCK
EMU
Voltage Regulator
VR
Real Time Clock
RTXO
RTXI
OUT
11
11
12
0, VR
10
OUT
1
13
9
Rev. PrG | Page 30 of 82 | December 2007
I/O
I
I
O
I/O Data Bus for Async, NAND and ATAPI Accesses
O
O
O
O
O
O
I
I/O USB D+ pin
I/O USB D- pin
C
C
I
I/O USB VBUS pin
A
A
O
A
A
C
C
I
I
O
I
I
I
O
O
C
C
1
Function (First/Second/Third/Fourth)
DDR Voltage Reference
DDR Voltage Reference Shield (connect to GND)
Address Bus for Async and ATAPI Addresses
Bank Selects
Byte Enables:Data Masks for Asynchronous Access/NAND Command Latch Enable
Byte Enables:Data Masks for Asynchronous Access/NAND Address Latch Enable
Output Enable/NOR Address Data Valid
Read Enable/NOR Output Enable
Write Enable
Clock XTAL input
Clock XTAL output
USB ID pin
USB voltage reference. Connect 0.1 F capacitor between USB_VREF and GND.
USB resistance set. Preliminary designs should connect USB_RSET to an unpopu-
lated resistor pad. Connect the other terminal of the unpopulated resistor to GND.
MXVR Frame Sync
MXVR Loop Filter Plus
MXVR Loop Filter Minus
MXVR Crystal Input
MXVR Crystal Output
Boot Mode Strap 0–3
JTAG Serial Data In
JTAG Serial Data Out
JTAG Reset
JTAG Mode Select
JTAG Clock
Emulation Output
External FET/BJT Drivers
RTC Crystal Output
RTC Crystal Input
Preliminary Technical Data