ADSP-BF542 AD [Analog Devices], ADSP-BF542 Datasheet - Page 33

• Manufacturer Part Number: ADSP-BF542
• Description: Embedded Processor
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
9
10
11
12
13
14
15
Parameter value applies to CLKIN pin only.
Parameter value applies to DA0–12, DBA0–1, DQ0–15, DQS0–1, DQM0–1, DCLK1–2, DCLK1–2, DCS0–1, DCLKE, DRAS, DCAS, and DWE pins only.
Certain ADSP-BF542/4/7/8/9 processor pins are 5.0 V tolerant (accept up to 5.5 V maximum V
See Absolute Maximum Ratings.
Parameter value applies to all input and bi-directional pins, except PB0, PB1, PE14, PE15, PG15–11, PH6, and PH7.
Parameter value applies to the following pins only: PB0, PB1, PE14, PE15, PG15–11, PH6, and PH7.
T
(V
PH6, and PH7 pins only. The 5.0 V tolerance exists only when power is applied to the V
functionality) and therefore require a pullup resistor. Consult the I
specified in the operating conditions table.
j
must meet the following conditions during OTP memory programming operations: 0 C < T
OH
) depends on the input V
DDEXT
, because V
OH
(maximum) approximately equals V
Rev. PrG | Page 33 of 82 | December 2007
2
C specification version 2.1 for the proper resistor value and other open drain pin electrical parameters.
DDEXT
DDEXT
(maximum). The 5.0 V tolerance feature applies to PB0, PB1, PE14, PE15, PG15–11,
j
pins. The PB0, PB1, PE14, and PE15 pins are open drain (regardless of pin
< 55 C. During OTP memory read operations, T
IH
when power is applied to V
DDEXT
ADSP-BF542/4/7/8/9
pins). Voltage compliance on outputs
j
should meet the conditions