T89C51RD2-3CBC-L ATMEL [ATMEL Corporation], T89C51RD2-3CBC-L Datasheet - Page 23

• Manufacturer Part Number: T89C51RD2-3CBC-L
• Description: 0 to 40MHz Flash Programmable 8-bit Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

T89C51RD2
The CMOD SFR includes three additional bits associated with the PCA (See Figure 7 and Table 7).
23
The CIDL bit which allows the PCA to stop during idle mode.
The WDTE bit which enables or disables the watchdog function on module 4.
Idle
Address 0D9H
Fosc /12
T0 OVF
Fosc / 4
CMOD
a.
b. f
CIDL
WDTE
-
CPS1
CPS0
ECF
P1.2
Symbol
User software should not write 1s to reserved bits. These bits may be used in future 8051 family
products to invoke new features. In that case, the reset or inactive value of the new bit will be 0, and its
active value will be 1. The value read from a reserved bit is indeterminate.
osc
= oscillator frequency
Function
Counter Idle control: CIDL = 0 programs the PCA Counter to continue functioning during
idle Mode. CIDL = 1 programs it to be gated off during idle.
Watchdog Timer Enable: WDTE = 0 disables Watchdog Timer function on PCA Module 4.
WDTE = 1 enables it.
Not implemented, reserved for future use.
PCA Count Pulse Select bit 1.
PCA Count Pulse Select bit 0.
PCA Enable Counter Overflow interrupt: ECF = 1 enables CF bit in CCON to generate an
interrupt. ECF = 0 disables that function of CF.
CPS1
Reset value
0
0
1
1
CIDL
Table 7. CMOD: PCA Counter Mode Register
CF
CPS0 Selected PCA input.
0
1
0
1
WDTE
CR
Internal clock f
Internal clock f
Timer 0 Overflow
External clock at ECI/P1.2 pin (max rate = f
Figure 7. PCA Timer/Counter
CIDL
0
WDTE
CCF4 CCF3
osc
osc
0
/12 ( Or f
/4 ( Or f
b
a
X
-
osc
osc
CPS1
CCF2
/2 in X2 Mode).
/6 in X2 Mode).
16 bit up/down counter
CH
X
-
CPS0
CCF1
ECF
CCF0
osc
X
-
/ 8)
CL
CMOD
0xD9
CCON
0xD8
CPS1
0
Rev. F - 15 February, 2001
overflow
CPS0
To PCA
modules
0
ECF
0
It