T89C51RD2-3CBC-L ATMEL [ATMEL Corporation], T89C51RD2-3CBC-L Datasheet - Page 55
T89C51RD2-3CBC-L
Manufacturer Part Number
T89C51RD2-3CBC-L
Description
0 to 40MHz Flash Programmable 8-bit Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.T89C51RD2-3CBC-L.pdf
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T89C51RD2
U: unprogrammed or "one" level.
P: programmed or "zero" level.
X:do not care
WARNING: Security level 2 and 3 should only be programmed after FLASH and code verification.
8.5. FLASH memory status
T89C51RD2 parts are delivered in standard with the ISP boot in the FLASH memory. After ISP or parallel
programming, the possible contents of the FLASH memory are summarized on the figure below:
8.6. Boot process
Boot loader FLASH
When the user application programs its own FLASH memory, all of the low level details are handled by a code
that is permanently contained in a 1k byte “Boot FLASH” and is located in the last kilobyte of the FLASH memory
from FC00h to FFFFh (See Figure 20). A user program simply calls the common entry point in the Boot FLASH
with appropriate parameters to accomplish the desired operation. Boot FLASH operations include functions like:
55
Security
FC00h
0000h
level
Program Lock Bits
1
2
3
Default
Boot
LB0
Virgin
U
X
P
LB1
U
U
P
After ISP
No program lock features enabled.
following commands are disabled:
- program byte
- program status byte and boot vector
- erase status byte and boot vector
Same as 2 and following commands also disabled:
- read byte
- read status byte and boot vector
- blank check
- program SSB level2
Application
Boot
Figure 19. FLASH memory possible contents
Table 31. Program Lock bits of the SSB
Dedicated
ISP
After ISP
Boot
Virgin
or appli
Protection description
After parallel
programming
Application
After parallel
programming
Dedicated
ISP
Boot
Virgin
or appli
Rev. F - 15 February, 2001
After parallel
programming
Boot
Virgin
or appli
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