T89C51RD2-3CBC-L ATMEL [ATMEL Corporation], T89C51RD2-3CBC-L Datasheet - Page 53

• Manufacturer Part Number: T89C51RD2-3CBC-L
• Description: 0 to 40MHz Flash Programmable 8-bit Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

T89C51RD2
U: unprogrammed or "one" level.
P: programmed or "zero" level.
X:do not care
WARNING: Security level 2 and 3 should only be programmed after FLASH and code verification.
These security bits protect the code access through the parallel programming interface. They are set by default to
level 4. The code access through the ISP is still possible and is controlled by the "software security bits" which
are stored in the extra FLASH memory accessed by the ISP firmware.
To load a new application with the parallel programmer, a chip erase must first be done. This will set the HSB
in its inactive state and will erase the FLASH memory, including the boot loader and the "Extra FLASH Memory"
(XAF). If needed, the 1K boot loader and the XAF content must be programmed in the FLASH; the code is
provided by ATMEL Wireless and Microcontrollers (see section 8.7. ); the part reference can always be read using
FLASH parallel programming modes.
8.4.2.3. Default values
The default value of the HSB provides parts ready to be programmed with ISP:
8.4.3. Software registers
Several registers are used, in factory and by parallel programmers, to make copies of hardware registers contents.
These values are used by ATMEL Wireless and Microcontrollers ISP (see section 8.7. ).
These registers are in the "Extra FLASH Memory" part of the FLASH memory. This block is also called "XAF"
or eXtra Array FLASH. They are accessed in the following ways:
53
Security
level
SB: Cleared to secure the content of the HSB.
BLJB: Cleared to force ISP operation.
BLLB: Clear to protect the default boot loader.
LB2-0: Security level four to protect the code from a parallel access with maximum security.
Commands issued by the parallel memory programmer.
Commands issued by the ISP software.
Calls of API issued by the application software.
1
2
3
4
Program Lock Bits
LB0
U
X
X
P
LB1
U
U
X
P
LB2
U
U
U
P
No program lock features enabled. MOVC instruction executed from external program
memory returns non encrypted data.
MOVC instruction executed from external program memory are disabled from fetching
code bytes from internal memory, EA is sampled and latched on reset, and further
parallel programming of the FLASH is disabled.ISP and software programming with
API are still allowed.
Same as 2, also verify through parallel programming interface is disabled.
Same as 3, also external execution is disabled.
Table 28. Program Lock bits
Protection description
Rev. F - 15 February, 2001