T89C51RD2-3CBC-L ATMEL [ATMEL Corporation], T89C51RD2-3CBC-L Datasheet - Page 66

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T89C51RD2-3CBC-L

Manufacturer Part Number
T89C51RD2-3CBC-L
Description
0 to 40MHz Flash Programmable 8-bit Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Note 1: P3.2 is pulled low during programming to indicate RDY/BUSY.
(P3.2 = 1 Ready; P3.2 = 0 Busy).
Note 2: In Page Load Mode the current byte is loaded on ALE rising edge.
Note 3: After a power up all external test mode to program or to erase the FLASH are locked to avoid any untimely programming or erasure.
After each programming or erasure test mode, it’s advised to lock this feature (test mode PELCK).
To validate the test mode mode PEULCK the following sequence has to be applied:
Test Mode PEULCK with ALE = 1.
Pulse on ALE (min width=25clk) with P0=55 (P0 latched on ALE rising edge)
Pulse on ALE (min width=25clk) with P0=AA (P0 latched on ALE rising edge)
Note 4: The highest security bit (bit 7) is used to secure the 7 lowest bit erasure. The only way to erase this bit is to erase the whole FLASH
memory.
Procedure to program security bits (After array programming):
- program bit7 to 0, program all other bits ( 1 = erased, 0 = programmed).
- test mode PGMS (din = HSB).
Procedure to erase security byte:
- test mode CERR: erase all array included HSB.
- program hardware security byte to FF: test mode PGMS (din = FF).
8.9.3. Definition of terms
Address Lines:P1.0-P1.7, P2.0-P2.5, P3.4-P3.5, respectively for A0-A15.
Data Lines:P0.0-P0.7 for D0-D7
Control Signals:RST, PSEN, P2.6, P2.7, P3.2, P3.3, P3.6, P3.7.
Program Signals: ALE/PROG, EA
Rev. F - 15 February, 2001
Mode Name
PEULCK
PELCK
PGMC
PGML
PGMV
PGMS
CERR
PGXC
PGXL
RXAF
TMS
VSB
Program or Erase Lock.
Disable the Erasure or Programming
access
Program or Erase UnLock.
Enable the Erasure or Programming
access
Write Code Data (byte)
or write Page
Always precedeed by PGML
Memory Page Load
(up to 128 bytes)
Read Code Data (byte)
Read Security Byte (=HSB)
Write lock Byte (Note 4)
(security byte = HSB)
Chip Erase User + XAF
Write Byte or Page Extra Memory
(XAF)
Always precedeed by PGXL
Memory Page Load XAF
(up to 128 bytes)
Read Signature bytes
30h (Manufacturer code)
31h (Device ID #1)
60h (Device ID #2)
61h (Device ID #3)
Read Extra Memory
(XAF)
Mode
P1[7..0]
A7-A0
A7-A0
A7-A0
A7-A0
A7-A0
(0-7F)
(0-7F)
(0-7F)
Addr
30h
31h
60h
61h
xx
xx
xx
xx
xx
P2[5..0]
A13-A8
A13-A8
A13-A8
xx
xx
xx
xx
xx
xx
xx
00
x
P3.0
x
x
1
1
1
1
1
1
1
1
x
1
P3.1
x
x
x
x
x
x
x
x
x
x
x
x
T89C51RD2
Note1
Note1
Note1
P3.2
x
x
x
x
x
x
x
x
x
P3.3
1
0
0
0
1
1
0
0
0
1
1
0
P3.4
A14
A14
A14
x
x
x
x
x
x
x
x
x
P3.5
A15
A15
A15
x
x
x
x
x
x
x
x
x
66

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