T89C51RD2-3CBC-L ATMEL [ATMEL Corporation], T89C51RD2-3CBC-L Datasheet - Page 56

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T89C51RD2-3CBC-L

Manufacturer Part Number
T89C51RD2-3CBC-L
Description
0 to 40MHz Flash Programmable 8-bit Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
erase block, program byte or page, verify byte or page, program security lock bit, etc. The Boot FLASH can be
locked to prevent erasing. If erased, the Boot FLASH can be restored by parallel programming. Indeed, ATMEL
Wireless and Microcontrollers provides the binary code of the default FLASH boot loader (see section 8.7. ).
Reset Code Execution
At the falling edge of reset (unless the hardware conditions on PSEN, EA and ALE are set as described below),
the T89C51RD2 reads the BLJB bit in the HSB byte. If this bit is set, it jumps to 0000h and if not, it jumps to
FC03h. At this address, the boot software reads two special FLASH registers: the Software Boot Vector (SBV)
and the Boot Status Byte (BSB). If the BSB is set to zero, power-up execution starts at location 0000h, which is
the normal start address of the user’s application code. When the Status Byte is set to a value other than zero, the
contents of the Boot Vector is used as the high byte of the execution address and the low byte is set to 00h. The
factory default setting is FCh, corresponding to the address FC00h for the factory default FLASH ISP boot loader.
A custom boot loader can be written with the Boot Vector set to the custom boot loader address.
It is recommanded to set the BSB before any other IAP so the device automatically resumes ISP when reset. ISP
routines shall only clear BSB after succesfull IAP completion.
Hardware Activation of the Boot Loader
The default boot loader can also be executed by holding PSEN LOW, EA HIGH, and ALE HIGH (or not connected)
at the falling edge of RESET. This has the same effect as having a non-zero status byte anf the Boot Vector equal
to FCh. This allows an application to be built that will normally execute the end user’s code but can be manually
forced into default ISP operation.
As PSEN has the same structure as P1-P3, the current to force PSEN to 0 as ITL is defined in the DC parameters.
If the factory default setting for the Boot Vector (FCh) is changed, it will no longer point to the ISP default
FLASH boot loader code. It can be restored:
After programming the FLASH, the status byte should be programmed to zero in order to allow execution of the
user’s application code beginning at address 0000h.
Rev. F - 15 February, 2001
With the default ISP activated with hardware conditions on PSEN, EA and ALE.
With a customized loader (in the end user application) that provides features for erasing and reprogramming
of the Boot Vector and BSB.
Through the parallel programming method.
FFF0
FC03
FC00
Figure 20. Boot loader memory map
Entry point for API
Status byte check
ISP start
T89C51RD2
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