T89C51RD2-3CBC-L ATMEL [ATMEL Corporation], T89C51RD2-3CBC-L Datasheet - Page 67

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T89C51RD2-3CBC-L

Manufacturer Part Number
T89C51RD2-3CBC-L
Description
0 to 40MHz Flash Programmable 8-bit Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
T89C51RD2
8.9.4. Programming Algorithm
To program the T89C51RD2 the following sequence must be exercised:
If the security bits are activated, the following commands must be done before programming:
To write a page in the FLASH memory, execute the following steps:
Repeat step 2 through 5 changing the address and data for end of a 128 bytes page
67
Check the signature bytes
Check the HSB (VSB mode)
Unlock test modes (PEULCK mode, pulse 55h and AAh)
Chip erase (CERR mode)
Write FFh in the HSB (PGMS mode)
Write the signature bytes content in the XAF
As the boot loader and the XAF content is lost after a "chip erase", it must be reprogrammed if needed.
Disable programming access (PELCK mode)
Step 0: Enable programming access (PEULCK mode)
Step 1: Activate the combination of control signals (PGML mode)
Step 2: Input the valid address on the address lines (High order bits of the address must be stable during the
complete ALE low time)
Step 3: Activate the combination of control signals (PGML mode)
Step 4: Input the appropriate data on the data lines.
Step 5: Pulse ALE/PROG once.
Step 6: Enable programming access (PEULCK mode)
Step 7: Activate the combination of control signals (PGMC mode)
PROGRAM
SIGNALS*
CONTROL
SIGNALS*
4 to 6 MHz
Figure 22. Set-Up Modes Configuration
EA
ALE/PROG
RST
PSEN
P2.6
P2.7
P3.3
P3.6
P3.7
XTAL1
V
P0.0-P0.7
P1.0-P1.7
CC
P3.5
P2.0-P2.5
P3.4
VSS
GND
+5V
D0-D7
A0-A7
A8-A13
A14
A15
Rev. F - 15 February, 2001

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