T89C51RD2-3CBC-L ATMEL [ATMEL Corporation], T89C51RD2-3CBC-L Datasheet - Page 48

• Manufacturer Part Number: T89C51RD2-3CBC-L
• Description: 0 to 40MHz Flash Programmable 8-bit Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

T89C51RD2
Example : .....
7.4. Read Data
The following procedure is used to read the data store in the EEPROM memory:
Example :
7.5. Registers
EECON (S:0D2h)
EEPROM Control Register
a.
b. User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In
Reset Value= XXXX XX00b
48
Bit Number
Wait :
Map the program space (Set bit EEE of EECON register)
Load DPTR with the address to read
Execute a MOVX A, @DPTR
User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In
that case, the reset or inactive value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is
indeterminate.
that case, the reset or inactive value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is
indeterminate.
EEPL3
7-4
7
3
2
1
0
ANL
JNZ
MOV
MOVX @DPTR,A
MOV
MOV
....
MOV
MOV
MOV EECON,#02h
MOVX A,@DPTR
...
...
Bit Mnemonic
EEPL2
EEBUSY
EEPL3-0
Wait
A,#01h
EECON,#02h
EECON,#50h or 52h ; Write Sequence
EECON,#A0h or A2h
A,EECON
EETIM,#3Ch
6
EEE
-
-
Programming Launch command bits
Not implemented, reserved for future use.
Not implemented, reserved for future use.
Enable EEPROM Space bit
Programming Busy flag
EEPL1
Write 5Xh followed by AXh to EECON to launch the programming.
Set to map the EEPROM space during MOVX instructions (Write in the column latches)
Clear to map the data space during MOVX.
Set by hardware when programming is in progress.
Cleared by hardware when programming is done.
Can not be set or cleared by software.
5
; A = Data
; DPTR = EEPROM data pointer
; EEE=1 EEPROM mapped
; Read data from EEPROM
; DPTR = EEPROM data pointer, A = Data to write
; EEE=1 EEPROM mapped
; Write data to EEPROM
; 12MHz*5 = 3Ch
Table 25. EECON Register
EEPL0
4
3
-
a
b
Description
2
-
Rev. F - 15 February, 2001
EEE
1
EEBUSY
0