T89C51RD2-3CBC-L ATMEL [ATMEL Corporation], T89C51RD2-3CBC-L Datasheet - Page 68

• Manufacturer Part Number: T89C51RD2-3CBC-L
• Description: 0 to 40MHz Flash Programmable 8-bit Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

Repeat step 0 through 9 changing the address and data until the entire array or until the end of the object file is
reached (See Figure 23.)
8.9.5. Verify algorithm
Verify must be done after each byte or block of bytes is programmed. In either case, a complete verify of the
programmed array will ensure reliable programming of the T89C51RD2.
P 2.7 is used to enable data output.
To verify the T89C51RD2 code the following sequence must be exercised:
Repeat step 2 through 3 changing the address for the entire array verification (See Figure 23.).
8.9.6. Extra memory mapping
The memory mapping the T89C51RD2 software registers in the Extra FLASH memory is described in the table below.
Rev. F - 15 February, 2001
Step 8: Input the valid address on the address lines.
Step 9: Pulse ALE/PROG once until P3.2 is high or the specified write time is reached.
Step 10: Disable programming access (PELCK mode)
Step 1:Activate the combination of program and control signals (PGMV)
Step 2: Input the valid address on the address lines.
Step 3: Read data on the data lines.
D0-D7
ALE/PROG
P2.7
Control signals
Copy of device ID #3
EA
A0-A15
5V
0V
Figure 23. Programming and Verification Signal’s Waveform
Table 34. Extra Row Memory Mapping (XAF)
Programming Cycle
Data In
48 clk (load latch ) or 10 ms (write)
Address
0061h
Read/Verify Cycle
Data Out
T89C51RD2
Default content
FFh
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