T89C51RD2-3CBC-L ATMEL [ATMEL Corporation], T89C51RD2-3CBC-L Datasheet - Page 52

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T89C51RD2-3CBC-L

Manufacturer Part Number
T89C51RD2-3CBC-L
Description
0 to 40MHz Flash Programmable 8-bit Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
8.4.2.1. Boot Loader Lock Bit (BLLB)
One bit of the HSB is used to secure by hardware the internal boot loader sector against software reprogramming.
When the BLLB is cleared, any attempt to write in the boot loader segment (Address FC00h to FFFFh) will have
no effect. This protection applies for software writing only.
Boot Loader Jump Bit (BLJB)
One bit of the HSB, the BLJB bit, is used to force the boot address:
8.4.2.2. FLASH memory lock bits
The three lock bits provide different levels of protection for the on-chip code and data, when programmed according
to Table 29.
Rev. F - 15 February, 2001
Number
When this bit is set the boot address is 0000h.
When this bit is reset the boot address is FC03h. By default, this bit is cleared and the ISP is enabled.
Bit
2-0
SB
7
6
5
4
3
7
Mnemonic
LB2-0
BLLB
BLJB
Bit
SB
-
-
BLJB
6
Safe Bit
Boot loader Jump Bit
described in the chapter 9.6).
Clear to force hardware boot address at FC03h (default).
Boot loader Lock Bit
Clear to forbid software programming and writing of the boot loader segment (default). This protection protect
only ISP or IAP access; protection through parallel access is done globally by the lock bits LB2-0.
Reserved
Reserved
User Memory Lock Bits
This bit must be cleared to secure the content of the HSB. Only security level can be increased.
Do not clear this bit.
Do not clear this bit.
See Table 29
BLLB
Set to force hardware boot address at 0000h. (unless previously force by hardware conditions as
Set to allow programming and writing of the boot loader segment.
Table 27. Hardware Security Byte (HSB)
5
4
-
3
-
Description
LB2
2
T89C51RD2
LB1
1
LB0
0
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