S9S12G96F0CLL Freescale Semiconductor, S9S12G96F0CLL Datasheet - Page 245

• Manufacturer Part Number: S9S12G96F0CLL
• Description: 16-bit Microcontrollers - MCU 16BIT 96K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G96F0CLL

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 96 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT

1
2.4.3.63
Freescale Semiconductor
Address 0x027E (G1, G2)
Address 0x027E (G3)
PIE1AD
PIF0AD
Read: Anytime
Write: Anytime, write 1 to clear
Field
Field
Reset
Reset
7-0
7-0
W
W
R
R
Port AD interrupt enable—
This bit enables or disables the edge sensitive pin interrupt on the associated pin. An interrupt can be generated if
the pin is operating in input or output mode when in use with the general-purpose or related peripheral function.
1 Interrupt is enabled
0 Interrupt is disabled (interrupt flag masked)
PIF0AD7
Port AD interrupt flag—
This flag asserts after a valid active edge was detected on the related pin (see
Wakeup”). This can be a rising or a falling edge based on the state of the polarity select register. An interrupt will
occur if the associated interrupt enable bit is set.
Writing a logic “1” to the corresponding bit field clears the flag.
1 Active edge on the associated bit has occurred
0 No active edge occurred
Port AD Interrupt Flag Register (PIF0AD)
0
0
0
7
7
PIF0AD6
0
0
0
6
6
Figure 2-62. Port AD Interrupt Flag Register (PIF0AD)
Table 2-88. PIE1AD Register Field Descriptions
Table 2-89. PIF0AD Register Field Descriptions
MC9S12G Family Reference Manual, Rev.1.23
PIF0AD5
0
0
0
5
5
PIF0AD4
0
0
0
4
4
Description
Description
PIF0AD3
PIF0AD3
3
0
3
0
PIF0AD2
PIF0AD2
0
0
2
2
Port Integration Module (S12GPIMV1)
Section 2.5.4.2, “Pin Interrupts and
PIF0AD1
PIF0AD1
Access: User read/write
Access: User read/write
0
0
1
1
PIF0AD0
PIF0AD0
0
0
0
0
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1
1