LPC11U35FHI33/501, NXP Semiconductors, LPC11U35FHI33/501, Datasheet - Page 15

• Manufacturer Part Number: LPC11U35FHI33/501,
• Description: ARM Microcontrollers - MCU 32-bit ARM Cortex-M0 64KB Flash 12KB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC11U35FHI33/501,

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC11U3x
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 12 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: HVQFN-32
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 490

NXP Semiconductors
Table 3.
[1]
[3]
[4]
[5]
[6]
[7]
[8]
7. Functional description
LPC11U3X
Product data sheet
[2]
Symbol
XTALOUT
V
V
DD
SS
Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled; IA = inactive, no pull-up/down enabled;
F = floating; If the pins are not used, tie floating pins to ground or power to minimize power consumption.
See
reset the chip and wake up from Deep power-down mode. An external pull-up resistor is required on this pin for the Deep power-down
mode.
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see
I
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see
includes high-current output driver.
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see
input glitch filter.
Pad provides USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and Low-speed mode
only). This pad is not 5 V tolerant.
When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). Leave XTALOUT floating.
2
C-bus pins compliant with the I
Figure 31
Pin description
for the reset pad configuration. RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to
7.1 On-chip flash programming memory
7.2 EEPROM
7.3 SRAM
The LPC11U3x contain up to 128 kB on-chip flash program memory. The flash can be
programmed using In-System Programming (ISP) or In-Application Programming (IAP)
via the on-chip boot loader software.
The flash memory is divided into 4 kB sectors with each sector consisting of 16 pages.
Individual pages can be erased using the IAP erase page command.
The LPC11U3x contain 4 kB of on-chip byte-erasable and byte-programmable EEPROM
data memory. The EEPROM can be programmed using In-Application Programming (IAP)
via the on-chip boot loader software.
The LPC11U3x contain a total of 8 kB, 10 kB, or 12 kB on-chip static RAM memory.
5
6;
29
33
2
E1
B4;
E2
B5;
D2
C-bus specification for I
7
8;
44
5;
41
All information provided in this document is subject to legal disclaimers.
9
10;
33;
48;
58
7;
54
[8]
Rev. 1 — 20 April 2012
Reset
state
[1]
-
-
-
2
C standard mode, I
Type Description
-
-
-
Output from the oscillator amplifier.
Supply voltage to the internal regulator, the external
rail, and the ADC. Also used as the ADC reference
voltage.
Ground.
2
C Fast-mode, and I
32-bit ARM Cortex-M0 microcontroller
2
C Fast-mode Plus.
Figure
LPC11U3x
© NXP B.V. 2012. All rights reserved.
30); includes digital
Figure
Figure
15 of 70
30);
30).