LPC11U35FHI33/501, NXP Semiconductors, LPC11U35FHI33/501, Datasheet - Page 26

• Manufacturer Part Number: LPC11U35FHI33/501,
• Description: ARM Microcontrollers - MCU 32-bit ARM Cortex-M0 64KB Flash 12KB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC11U35FHI33/501,

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC11U3x
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 12 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: HVQFN-32
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 490

NXP Semiconductors
LPC11U3X
Product data sheet
7.17.5.1 Power profiles
7.17.5.2 Sleep mode
7.17.5.3 Deep-sleep mode
7.17.5.4 Power-down mode
consumption by eliminating all dynamic power use in any peripherals that are not required
for the application. Selected peripherals have their own clock divider which provides even
better power control.
The power consumption in Active and Sleep modes can be optimized for the application
through simple calls to the power profile. The power configuration routine configures the
LPC11U3x for one of the following power modes:
In addition, the power profile includes routines to select the optimal PLL settings for a
given system clock and PLL input clock.
Remark: When using the USB, configure the LPC11U3x in Default mode.
When Sleep mode is entered, the clock to the core is stopped. Resumption from the Sleep
mode does not need any special sequence but re-enabling the clock to the ARM core.
In Sleep mode, execution of instructions is suspended until either a reset or interrupt
occurs. Peripheral functions continue operation during Sleep mode and can generate
interrupts to cause the processor to resume execution. Sleep mode eliminates dynamic
power used by the processor itself, by memory systems and related controllers, and by
internal buses.
In Deep-sleep mode, the LPC11U3x is in Sleep-mode and all peripheral clocks and all
clock sources are off except for the IRC. The IRC output is disabled unless the IRC is
selected as input to the watchdog timer. In addition all analog blocks are shut down and
the flash is in stand-by mode. In Deep-sleep mode, the application can keep the watchdog
oscillator and the BOD circuit running for self-timed wake-up and BOD protection.
The LPC11U3x can wake up from Deep-sleep mode via reset, selected GPIO pins, a
watchdog timer interrupt, or an interrupt generating USB port activity.
Deep-sleep mode saves power and allows for short wake-up times.
In Power-down mode, the LPC11U3x is in Sleep-mode and all peripheral clocks and all
clock sources are off except for watchdog oscillator if selected. In addition all analog
blocks and the flash are shut down. In Power-down mode, the application can keep the
BOD circuit running for BOD protection.
The LPC11U3x can wake up from Power-down mode via reset, selected GPIO pins, a
watchdog timer interrupt, or an interrupt generating USB port activity.
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Default mode corresponding to power configuration after reset.
CPU performance mode corresponding to optimized processing capability.
Efficiency mode corresponding to optimized balance of current consumption and CPU
performance.
Low-current mode corresponding to lowest power consumption.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 April 2012
32-bit ARM Cortex-M0 microcontroller
LPC11U3x
© NXP B.V. 2012. All rights reserved.
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