LPC11U35FHI33/501, NXP Semiconductors, LPC11U35FHI33/501, Datasheet - Page 16

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LPC11U35FHI33/501,

Manufacturer Part Number
LPC11U35FHI33/501,
Description
ARM Microcontrollers - MCU 32-bit ARM Cortex-M0 64KB Flash 12KB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC11U35FHI33/501,

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC11U3x
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
64 KB
Data Ram Size
12 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
HVQFN-32
Mounting Style
SMD/SMT
Factory Pack Quantity
490
NXP Semiconductors
LPC11U3X
Product data sheet
7.4 On-chip ROM
7.5 Memory map
The on-chip ROM contains the boot loader and the following Application Programming
Interfaces (APIs):
The LPC11U3x incorporates several distinct memory regions, shown in the following
figures.
program viewpoint following reset. The interrupt vector area supports address remapping.
The AHB (Advanced High-performance Bus) peripheral area is 2 MB in size and is divided
to allow for up to 128 peripherals. The APB (Advanced Peripheral Bus) peripheral area is
512 kB in size and is divided to allow for up to 32 peripherals. Each peripheral of either
type is allocated 16 kB of space. This addressing scheme allows simplifying the address
decoding for each peripheral.
In-System Programming (ISP) and In-Application Programming (IAP) support for flash
including IAP erase page command.
IAP support for EEPROM
USB API
Power profiles for configuring power consumption and PLL settings
32-bit integer division routines
Figure 6
All information provided in this document is subject to legal disclaimers.
shows the overall map of the entire address space from the user
Rev. 1 — 20 April 2012
32-bit ARM Cortex-M0 microcontroller
LPC11U3x
© NXP B.V. 2012. All rights reserved.
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