ISL6334ACRZ Intersil, ISL6334ACRZ Datasheet - Page 14

• Manufacturer Part Number: ISL6334ACRZ
• Description: IC CTRLR PWM 4PHASE BUCK 40-QFN
• Manufacturer: Intersil

Specifications of ISL6334ACRZ

• Applications: Controller, Intel VR11.1
• Voltage - Input: 3 ~ 12 V
• Number Of Outputs: 1
• Voltage - Output: 0.5 ~ 1.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 40-VFQFN, 40-VFQFPN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

When PSI# is asserted low, indicating the low power mode
operation of the processor, the controller drops the number of
active phases according to the logic on Table 1 for highlight
load efficiency performance. SS and FS pins are used to
program the controller in operation of non-coupled, 2-phase
coupled, or (n-x)-Phase coupled inductors. Different cases yield
different PWM output behaviors on both dropped phase(s) and
remained phase(s) as PSI# is asserted and de-asserted. A high
PSI# input signal pulls the controller back to normal CCM PWM
operation to sustain an immediate heavy transient load and
high efficiency. Note that “n-x” means n-x phase coupled and x
phase(s) are uncoupled.
The dropped PWM is forced low for 200ns (uncoupled case)
or until falling edge of coupled PWM (coupled case) then
pulled to VCC/2, while the remained PWM(s) sends out a
special 3-level PWM protocol that the dedicated VR11.1
drivers can decode and then enter diode emulation mode
with gate drive voltage optimization.
The ISL6334A only generates 2-level normal CCM PWM
except for faults. No dedicated VR11.1 driver is required.
See “Controller and Driver Recommendation” on page 3.
While the controller is operational (VCC above POR,
EN_VTT and EN_PWR are both high, valid VID inputs), it
can pull the PWM pins to ~40% of VCC (~2V for 5V VCC
bias) during various stages, such as soft start delay, phase
shedding operation, or fault conditions (OC or OV events).
The matching driver's internal PWM resistor divider can
further raise the PWM potential, but not lower it below the
level set by the controller IC. Therefore, the controller's
PWM outputs are directly compatible with Intersil drivers that
require 5V PWM signal amplitudes. Drivers requiring 3.3V
PWM signal amplitudes are generally incompatible.
Switching Frequency
Switching frequency is determined by the selection of the
frequency-setting resistor, R
pin to GND or VCC. Equation 3 and Figure 3 are provided to
assist in selecting the correct resistor value.
where F
R
Non CI or (n-1) CI Drops to 1-phase
Non CI or (n-2) CI Drops to 2-phase
2-phase CI Drops to 1-phase
2-phase CI Drops to 2-phase
Normal CCM PWM Mode
T
=
2.5X10
------------------------- -
SW
F
SW
TABLE 1. PSI# OPERATION DECODING
is the switching frequency of each phase.
10
T
14
, which is connected from FS
PSI#
0
0
0
0
1
FS
0
0
1
1
x
ISL6334, ISL6334A
(EQ. 3)
SS
0
1
0
1
x
Current Sensing
The ISL6334, ISL6334A senses current continuously for fast
response. The ISL6334, ISL6334A supports inductor DCR
sensing, or resistive sensing techniques. The associated
channel current sense amplifier uses the ISEN inputs to
reproduce a signal proportional to the inductor current, I
The sense current, I
current. The sensed current is used for current balance,
load-line regulation, and overcurrent protection.
The internal circuitry, shown in Figures 4, and 5, represents
one channel of an N-channel converter. This circuitry is
repeated for each channel in the converter, but may not be
active depending on the status of the PWM2, PWM3 and
PWM4 pins, as described in “PWM and PSI# Operation” on
page 13. The input bias current of the current sensing
amplifier is typically 60nA; less than 5k
preferred to minimized the offset error.
INDUCTOR DCR SENSING
An inductor’s winding is characteristic of a distributed
resistance, as measured by the DCR (Direct Current
Resistance) parameter. Consider the inductor DCR as a
separate lumped quantity, as shown in Figure 4. The
channel current I
pass through the DCR. Equation 4 shows the s-domain
equivalent voltage across the inductor V
A simple R-C network across the inductor extracts the DCR
voltage, as shown in Figure 4.
V
L
s ( )
250
200
150
100
=
50
0
100k 200k 300k 400k 500k 600k 700k 800k 900k 1M
I
FIGURE 3. SWITCHING FREQUENCY vs RT
L
⋅
(
s L
⋅
L
+
, flowing through the inductor, will also
DCR
SEN
SWITCHING FREQUENCY (Hz)
)
, is proportional to the inductor
Ω
L
input impedance is
.
May 28, 2009
(EQ. 4)
FN6482.1
L
.