ISL6334ACRZ Intersil, ISL6334ACRZ Datasheet - Page 26

• Manufacturer Part Number: ISL6334ACRZ
• Description: IC CTRLR PWM 4PHASE BUCK 40-QFN
• Manufacturer: Intersil

Specifications of ISL6334ACRZ

• Applications: Controller, Intel VR11.1
• Voltage - Input: 3 ~ 12 V
• Number Of Outputs: 1
• Voltage - Output: 0.5 ~ 1.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 40-VFQFN, 40-VFQFPN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

balance loop as well as setting the overcurrent trip point.
Select values for these resistors by using Equation 30:
where R
pin, N is the active channel number, R
the current sense element, either the DCR of the inductor or
R
desired overcurrent trip point. Typically, I
to be 1.2x the maximum load current of the specific
application.
With integrated temperature compensation, the sensed
current signal is independent on the operational temperature
of the power stage, i.e. the temperature effect on the current
sense element R
temperature compensation function. R
should be the resistance of the current sense element at the
room temperature.
When the integrated temperature compensation function is
disabled by pulling the TCOMP pin to GND, the sensed
current will be dependent on the operational temperature of
the power stage, since the DC resistance of the current
sense element may be changed according to the operational
temperature. R
resistance of the current sense element at the all operational
temperature.
In certain circumstances, it may be necessary to adjust the
value of one or more ISEN resistors. When the components
of one or more channels are inhibited from effectively
dissipating their heat so that the affected channels run hotter
than desired, choose new, smaller values of RISEN for the
affected phases (see the section entitled “Channel-Current
Balance” on page 15). Choose R
desired decrease in temperature rise in order to cause
proportionally less current to flow in the hotter phase, as
shown in Equation 31:
In Equation 31, make sure that ΔT
rise above the ambient temperature, and ΔT
temperature rise above the ambient temperature. While a
single adjustment according to Equation 31 is usually
sufficient, it may occasionally be necessary to adjust R
two or more times to achieve optimal thermal balance
between all channels.
Load-Line Regulation Resistor
The load-line regulation resistor is labelled R
Its value depends on the desired loadline requirement of the
application.
The desired loadline can be calculated using Equation 32:
R
R
R
SENSE
ISEN
ISEN 2 ,
LL
=
V
------------------------ -
=
ISEN
DROOP
=
depending on the sensing method, and I
-------------------------- -
105 10
I
FL
R
ISEN
R
×
is the sense resistor connected to the ISEN+
X
X
–
X
in Equation 30 should be the maximum DC
6
ΔT
----------
ΔT
is cancelled by the integrated
I
------------- -
OCP
2
1
N
26
ISEN,2
2
is the desired temperature
X
X
in proportion to the
is the resistance of
OCP
in Equation 30
1
is the measured
FB
can be chosen
in Figure 6.
OCP
ISL6334, ISL6334A
(EQ. 30)
(EQ. 31)
(EQ. 32)
ISEN
is the
where I
and VR
load condition.
Based on the desired loadline R
resistor can be calculated using Equation 33:
where N is the active channel number, R
resistor connected to the ISEN+ pin, and R
resistance of the current sense element, either the DCR of
the inductor or R
If one or more of the current sense resistors are adjusted for
thermal balance (as in Equation 31), the load-line regulation
resistor should be selected based on the average value of
the current sensing resistors, as given in Equation 34:
where R
the n
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
COMPENSATING LOAD-LINE REGULATED
CONVERTER
The load-line regulated converter behaves in a similar
manner to a peak-current mode controller because the two
poles at the output-filter L-C resonant frequency split with
the introduction of current information into the control loop.
The final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the L-C
poles and the ESR zero of the voltage-mode approximation
yields a solution that is always stable with very close to ideal
transient performance.
R
R
FB
FB
th
=
=
ISEN+ pin.
FL
N R
--------------------------------- -
R
----------
DROOP
R
ISEN(n)
LL
X
is the full load current of the specific application,
ISEN
R
∑
n
X
R
R
is the desired voltage droop under the full
ISEN n ( )
is the current sensing resistor connected to
SENSE
LL
depending on the sensing method.
C
LL
and C
, the loadline regulation
C
.
ISEN
X
is the
is the sense
May 28, 2009
(EQ. 33)
(EQ. 34)
FN6482.1