DS26528DK Maxim Integrated Products, DS26528DK Datasheet - Page 144

• Manufacturer Part Number: DS26528DK
• Description: KIT DESIGN FOR DS26528
• Manufacturer: Maxim Integrated Products

Specifications of DS26528DK

• Main Purpose: Telecom, Framer and Line Interface Units (LIUs)
• Utilized Ic / Part: G575DS26528
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Note: This register has an alternate definition for E1 mode. See RCR1.
Bit 7: Sync Time (SYNCT).
Bit 6: Receive B8ZS Enable (RB8ZS).
Bit 5: Receive Frame Mode Select (RFM).
Bit 4: Auto Resync Criteria (ARC).
Bit 3: Sync Criteria (SYNCC).
Bit 2: Receive Japanese CRC6 Enable (RJC).
Bit 1: Sync Enable (SYNCE).
Bit 0: Resynchronize (RESYNC). When toggled from low to high, a resynchronization of the receive-side framer is
initiated. Must be cleared and set again for a subsequent resync.
0 = qualify 10 bits
1 = qualify 24 bits
0 = B8ZS disabled
1 = B8ZS enabled
0 = ESF framing mode
1 = D4 framing mode
0 = resync on OOF or LOS event
1 = resync on OOF only
In D4 Framing Mode:
0 = search for Ft pattern, then search for Fs pattern
1 = cross couple Ft and Fs pattern
In ESF Framing Mode:
0 = search for FPS pattern only
1 = search for FPS and verify with CRC-6
0 = use ANSI:AT&T:ITU-T CRC-6 calculation (normal operation)
1 = use Japanese standard JT-G704 CRC-6 calculation
0 = auto resync enabled
1 = auto resync disabled
SYNCT
7
0
RCR1 (T1 Mode)
Receive Control Register 1
081h + (200h x n): where n = 0 to 7, for Ports 1 to 8
RB8ZS
6
0
RFM
5
0
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ARC
4
0
SYNCC
3
0
DS26528 Octal T1/E1/J1 Transceiver
RJC
2
0
SYNCE
1
0
RESYNC
0
0