DS26528DK Maxim Integrated Products, DS26528DK Datasheet - Page 35

• Manufacturer Part Number: DS26528DK
• Description: KIT DESIGN FOR DS26528
• Manufacturer: Maxim Integrated Products

Specifications of DS26528DK

• Main Purpose: Telecom, Framer and Line Interface Units (LIUs)
• Utilized Ic / Part: G575DS26528
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.8.1.7 Mapping E1 Channels onto a 1.544MHz Backplane
The user can use the RSCLKM bit (RIOCR.4) to enable the receive elastic store to operate with a 1.544MHz
backplane (24 channels / frame + F-bit). In this mode the user can choose which of the E1 time slots will be
ignored (not transmitted onto RSER) by programming the Receive Blank Channel Select registers
(RBCS1:RBCS4). A logic 1 in the associated bit location causes the elastic store to ignore the incoming E1 data for
that channel. Typically the user will want to program eight channels to be ignored. The default (power-up)
configuration will ignore channels 25 to 32, so that the first 24 E1 channels are mapped into the 24 channels of the
1.544MHz backplane. In this mode the F-bit location at RSER is always set to 1.
For example, if the user wants to ignore E1 time slots 0 (channel 1) and TS16 (channel 17), the
registers would be programmed as follows:
8.8.2 IBO Multiplexer
The Interleaved Bus Operation (IBO) multiplexer is used in conjunction with the IBO function located within each
framer/formatter block (controlled by the
simplifies user interface by connecting bus signals internally. The IBO multiplexer eliminates the need for ganged
external wiring and tri-state output drivers on the RSER and RSIG pins. This option provides a more controlled,
cleaner, and lower power mode of operation.
Note that the channel block signals TCHBLK and RCHBLK are output at the rate of the of IBO selection. Hence, a
4.096MHz IBO would have the channel blocks (if programmed active at the rate of 4.096MHz). The particular
blocking channel would be active for a duration of the channel if programmed.
The DS26528 also supports the traditional mode of IBO operation by allowing complete access to individual
framers, and tri-stating the RSER and RSIG pins at the appropriate times for external bus wiring. This mode of
operation is enabled per framer in the associated
disabled (IBOMS0 = 0 and IBOMS1 = 0).
Figure
the pin function changes for each mode of the IBO multiplexer.
Table 8-4. Registers Related to the IBO Multiplexer
Note: The addresses shown are for Framer 1. Addresses for Framers 2 to 8 can be calculated by using the following: Framer n = (Framer 1
address + (n – 1) x 200h), where n = 2 to 8 for Framers 2 to 8.
Global Transceiver Control Register 1
(GTCR1)
Receive Interleave Bus Operation
Control Register (RIBOC)
Transmit Interleave Bus Operation
Control Register (TIBOC)
8-3,
Figure
REGISTER
8-4, and
Figure 8-5
show the equivalent internal circuit for each IBO mode.
ADDRESSES
RIBOC
FRAMER
0F0h
088h
188h
RIBOC
RBCS4
RBCS1
RBCS2
RBCS3
and
35 of 276
TIBOC
and
= FCh
= 01h
= 00h
= 01h
This is a global register for all eight framers. It can be
used to specify ganged operation for the IBO.
This register can be used for control of how many
framers and the corresponding speed for the IBO
links for the receiver.
This register can be used for control of how many
framers and the corresponding speed for the IBO
links for the transmitter.
TIBOC
registers). When enabled, the IBO multiplexer
registers, while leaving the IBO multiplexer is
DS26528 Octal T1/E1/J1 Transceiver
FUNCTION
Table 8-4
RBCS1:RBCS4
describes