C8051F060DK Silicon Laboratories Inc, C8051F060DK Datasheet - Page 118

DEV KIT FOR F060/F062/F063

C8051F060DK

Manufacturer Part Number
C8051F060DK
Description
DEV KIT FOR F060/F062/F063
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet

Specifications of C8051F060DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F06x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F060
Silicon Family Name
C8051F06x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051060, C8051F062 and C8051F063
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1214

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F060DK
Manufacturer:
Silicon Labs
Quantity:
135
C8051F060/1/2/3/4/5/6/7
Comparator inputs can be externally driven from -0.25 V to (VDD) + 0.25 V without damage or upset. The
complete electrical specifications for the Comparator are given in Table 12.1.
The Comparator response time may be configured in software using the CPnMD1-0 bits in register CPT-
nMD (see Figure 12.4). Selecting a longer response time reduces the amount of power consumed by the
comparator. See Table 12.1 for complete timing and current consumption specifications.
The hysteresis of the Comparator is software-programmable via its Comparator Control register (CPT-
nCN). The user can program both the amount of hysteresis voltage (referred to the input voltage) and the
positive and negative-going symmetry of this hysteresis around the threshold voltage.
The Comparator hysteresis is programmed using Bits3-0 in the Comparator Control Register CPTnCN
(shown in Figure 12.3). The amount of negative hysteresis voltage is determined by the settings of the
CPnHYN bits. As shown in Figure 12.2, the negative hysteresis can be programmed to three different set-
tings, or negative hysteresis can be disabled. In a similar way, the amount of positive hysteresis is deter-
mined by the setting the CPnHYP bits.
118
(Programmed with CPnHYP Bits)
Positive Hysteresis Voltage
INPUTS
OUTPUT
VIN+
VIN-
CIRCUIT CONFIGURATION
Positive Hysteresis
CPn-
CPn+
VIN+
VIN-
Disabled
V
OL
Figure 12.2. Comparator Hysteresis Plot
V
OH
+
_
CPn
Positive Hysteresis
Maximum
OUT
Rev. 1.2
Negative Hysteresis
Disabled
Negative Hysteresis
(Programmed by CPnHYN Bits)
Maximum
Negative Hysteresis Voltage

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