ST72F324BJ6T6 STMicroelectronics, ST72F324BJ6T6 Datasheet - Page 118

• Manufacturer Part Number: ST72F324BJ6T6
• Description: IC MCU 8BIT 32K FLASH 44-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F324BJ6T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ST72F3x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-5590

On-chip peripherals
Note:
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Conventional baud rate generation
The baud rate for the receiver and transmitter (Rx and Tx) are set independently and
calculated as follows:
with:
PR = 1, 3, 4 or 13 (see SCP[1:0] bits)
TR = 1, 2, 4, 8, 16, 32, 64,128
(see SCT[2:0] bits)
RR = 1, 2, 4, 8, 16, 32, 64,128
(see SCR[2:0] bits)
All these bits are in the
Example: If f
receive baud rates are 38400 baud.
The baud rate registers MUST NOT be changed while the transmitter or the receiver is
enabled.
Extended baud rate generation
The extended prescaler option gives a very fine tuning on the baud rate, using a 255 value
prescaler, whereas the conventional baud rate generator retains industry standard software
compatibility.
The extended baud rate generator block diagram is described in
The output clock rate sent to the transmitter or to the receiver will be the output from the 16
divider divided by a factor ranging from 1 to 255 set in the SCIERPR or the SCIETPR
register.
The extended prescaler is activated by setting the SCIETPR or SCIERPR register to a value
other than zero. The baud rates are calculated as follows:
with:
ETPR = 1,..,255, see
page 128.
ERPR = 1,.. 255, see
page 128
CPU
is 8 MHz (normal mode) and if PR = 13 and TR = RR = 1, the transmit and
SCI Extended Transmit Prescaler Division Register (SCIETPR) on
SCI Extended Receive Prescaler Division Register (SCIERPR) on
SCI Baud Rate Register (SCIBRR) on page
Tx =
Tx =
16
Doc ID13466 Rev 4
(16
*
ETPR*(PR*TR)
f
CPU
*
f
PR)
CPU
*
TR
Rx =
Rx =
16
*
ERPR*(PR*RR)
(16
f
CPU
f
*
CPU
PR)
*
RR
Figure
127.
57.
ST72324B-Auto